CompactRISC is a family of instruction set architectures from National Semiconductor . The architectures are designed according to reduced instruction set computing principles, and are mainly used in microcontrollers . The subarchitectures of this family are the 16-bit CR16 and CR16C and the 32-bit CRX .
3-860: Features of CR16 family: compact implementations (less than 1 mm with 250 nm ), addressing of 2 MB (2), frequencies up to 66 MHz, hardware multiplier for 16-bit integers. It has complex instructions such as bit manipulation, saving/restoring and push/pop of several registers with single command. CR16 has 16 general purpose registers of 16 bits, and address registers of 21 bits wide. There are 8 special registers: program counter, interrupt stack pointer ISP, interrupt vector address register INTBASE, status register PSR, configuration register and 3 debug registers. Status register implements flags: C, T, L, F, Z, N, E, P, I. Instructions are encoded in two-address form in several formats, usually they have 16-bit encoding, but there are two formats for medium immediate instructions with length of 32-bit. Typical opcode length
6-510: Is 4 bits (bits 9–12 of most encoding types. Basic encoding formats are: CR16C comes with a different opcode encoding format, has 23–32-bit-wide address registers and provides two 32-bit general purpose registers. CR16 implements traps and interrupts. Implementations of CR16 has three-stage pipeline: fetch, decode, execute. CR16 was used in several National Semiconductor microcontrollers, and since 2001 integrated microcontrollers were available having built-in flash memory. Since 2007 CR16-based IP
9-411: Was available to licensing This microcomputer - or microprocessor -related article is a stub . You can help Misplaced Pages by expanding it . 250 nanometer The 250 nm process ( 250 nanometer process or 0.25 μm process ) is a level of semiconductor process technology that was reached by most manufacturers in the 1997–1998 timeframe. This nanotechnology-related article
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