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24-906: BSB may refer to: Computing [ edit ] Back-side bus , data bus in a computer Media, arts & entertainment [ edit ] Backstreet Boys , American boy band British Satellite Broadcasting , former UK satellite television broadcaster Beat Sneak Bandit Places [ edit ] Bandar Seri Begawan , the capital of Brunei Brasília , Brazil Brasília International Airport , Brazil, IATA code Samarinda International Airport , BSB, Samarinda Varanasi Junction railway station , Varanasi, India (station code) Banking [ edit ] Bank Services Billing , electronic bills sent by banks Bank state branch , branch code used in Australia Banking Standards Board , promoting standards in

48-468: A bidirectional bus, often implemented as a three-state bus . To prevent bus contention on the address bus, a bus arbiter selects which particular bus master is allowed to drive the address bus during this bus cycle. Intel has used the term Dual Independent Bus (DIB) for two different purposes. The first one came when Intel changed from a single local bus to the DIB, using the external front-side bus to

72-418: A central control unit and arithmetic logic unit (ALU, which he called the central arithmetic part) were combined with computer memory and input and output functions to form a stored program computer . The Report presented a general organization and theoretical model of the computer, however, not the implementation of that model. Soon designs integrated the control unit and ALU into what became known as

96-547: A screw thread standard Organizations [ edit ] Bayerische Staatsbibliothek , Bavarian State Library Broad Sustainable Building , is a Chinese construction company BPO Standards Board, applying BPO standards and guidelines in real estate Barons Bus Lines , an American bus company Military [ edit ] Brigade Speciale Beveiligingsopdrachten , Dutch special forces Sports [ edit ] British Superbike Championship , motorcycle racing championship Broad Street Bullies, nickname of

120-436: A single system bus , because a single bus typically became a severe bottleneck as CPUs and memory speeds increased. Due to its dedicated nature, the back-side bus can be optimized for communication with cache, thus eliminating protocol overheads and additional signals that are required on a general-purpose bus. Furthermore, since a BSB operates over a shorter distance, it can typically operate at higher clock speeds, increasing

144-651: A single system bus, starting with the S-100 bus in the Altair 8800 computer system in about 1975. The IBM PC used the Industry Standard Architecture (ISA) bus as its system bus in 1981. The passive backplanes of early models were replaced with the standard of putting the CPU and RAM on a motherboard , with only optional daughterboards or expansion cards in system bus slots. The Multibus became

168-607: A standard of the Institute of Electrical and Electronics Engineers as IEEE standard 796 in 1983. Sun Microsystems developed the SBus in 1989 to support smaller expansion cards. The easiest way to implement symmetric multiprocessing was to plug in more than one CPU into the shared system bus, which was used through the 1980s. However, the shared bus quickly became the bottleneck and more sophisticated connection techniques were explored. Even in very simple systems, at various times

192-585: A variety of separate buses adapted to more specific needs. The system level bus (as distinct from a CPU's internal datapath busses) connects the CPU to memory and I/O devices. Typically a system level bus is designed for use as a backplane . Many of the computers were based on the First Draft of a Report on the EDVAC report published in 1945. In what became known as the Von Neumann architecture ,

216-401: Is a single computer bus that connects the major components of a computer system, combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to determine its operation. The technique was developed to reduce costs and improve modularity, and although popular in the 1970s and 1980s, more modern computers use

240-492: Is allowed to drive the data bus during this bus cycle. In very simple systems, every instruction cycle starts with a READ memory cycle where program memory drives the instruction onto the data bus while the instruction register latches that instruction from the data bus. Some instructions continue with a WRITE memory cycle where the memory data register drives data onto the data bus into the chosen RAM or I/O device. Other instructions continue with another READ memory cycle where

264-459: Is obsolete in the modern personal and server computers, which instead use higher-performance interconnection technologies such as HyperTransport and Intel QuickPath Interconnect , while the system bus architecture continued to be used on simpler embedded microprocessors. The systems bus can even be internal to a single integrated circuit, producing a system-on-a-chip . Examples include AMBA , CoreConnect , and Wishbone . Direct Media Interface

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288-834: The IBM and Freescale (formerly the semiconductor division of Motorola ) PowerPC processors (certain PowerPC 604 models, the PowerPC 7xx family, and the Freescale 7xxx line), as well as the Intel Pentium Pro , Pentium II and early Pentium III processors, which used it to access their L2 cache (earlier Intel processors accessed the L2 cache over the FSB, while later processors moved it on-chip). System bus A system bus

312-480: The Philadelphia Flyers teams of the 1970s İstanbul Büyükşehir Belediyespor (basketball) or İstanbul BŞB, Turkey Politics [ edit ] БСБ , a Russian anti-war flag Topics referred to by the same term [REDACTED] This disambiguation page lists articles associated with the title BSB . If an internal link led you here, you may wish to change the link to point directly to

336-517: The cache coherence of shared data located in different caches have to be sent in broadcast (snooped) to check the other FSB's CPUs' cache state, reducing the available bandwidth. To reduce the coherency traffic, a snoop filter was included in the higher-end chipsets, in order to have cache state information available on-chipset. In 2007 Intel extended the idea of multiple buses in the 7300 chipset with four independent FSBs, calling it dedicated high-speed interconnects (DHSI). The system bus approach

360-420: The central processing unit (CPU). Computers in the 1950s and 1960s were generally constructed in an ad-hoc fashion. For example, the CPU, memory, and input/output units were each one or more cabinets connected by cables. Engineers used the common techniques of standardized bundles of wires and extended the concept as backplanes were used to hold printed circuit boards in these early machines. The name "bus"

384-1168: The banking industry in the UK Beneficial State Bank , an Oakland, California-based community development bank Legal [ edit ] Bar Standards Board , regulating barristers in England and Wales Schools & universities [ edit ] Basel School of Business in Switzerland British School of Brussels in Brussels British School of Bahrain in Bahrain British School of Beijing in China Burgundy School of Business in France British School of Barcelona in Spain Science and technology [ edit ] British Standard Brass ,

408-407: The chosen RAM, program memory, or I/O device drives data onto the data bus while the memory data register latches that data from the data bus. More complex systems have a multi-master bus —not only do they have many devices that each drive the data bus, but also have many bus masters that each drive the address bus. The address bus as well as the data bus in bus snooping systems is required to be

432-457: The computer's overall performance. Cache connected with a BSB was initially external to the microprocessor die , but now is usually on-die. In the latter case, the BSB clock frequency is typically equal to the processor's, and the back-side bus can also be made much wider (256-bit, 512-bit) than either off-chip or on-chip FSB. The dual-bus architecture was used in a number of designs, including

456-447: The data bus is driven by the program memory, by RAM, and by I/O devices. To prevent bus contention on the data bus, at any one instant only one device drives the data bus. In very simple systems, only the data bus is required to be a bidirectional bus. In very simple systems, the memory address register always drives the address bus, the control unit always drives the control bus, and an address decoder selects which particular device

480-402: The intended article. Retrieved from " https://en.wikipedia.org/w/index.php?title=BSB&oldid=1210569525 " Category : Disambiguation pages Hidden categories: Short description is different from Wikidata All article disambiguation pages All disambiguation pages Back-side bus [REDACTED] BSB is an improvement over the older practice of using

504-576: The main system memory and I/O devices, and the internal back-side bus to the L2 CPU cache . This was introduced in the Pentium Pro in 1995. In 2005 and 2006 Intel introduced the 8500 and 5000 chipsets, where DIB referred to the two front-side buses on a chipset, which doubles the system bandwidth compared to having just one FSB shared by all the CPUs. However, the information needed to guarantee

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528-446: The required control and power buses ) were sometimes combined into a single unified system bus. Modularity and cost became important as computers became small enough to fit in a single cabinet (and customers expected similar price reductions). Digital Equipment Corporation (DEC) further reduced cost for mass-produced minicomputers , and memory-mapped I/O into the memory bus, so that the devices appeared to be memory locations. This

552-453: Was already used for " bus bars " that carried electrical power to the various parts of electric machines, including early mechanical calculators. The advent of integrated circuits vastly reduced the size of each computer unit, and buses became more standardized. Standard modules could be interconnected in more uniform ways and were easier to develop and maintain. To provide even more modularity with reduced cost, memory and I/O buses (and

576-594: Was implemented in the Unibus of the PDP-11 around 1969, eliminating the need for a separate I/O bus. Even computers such as the PDP-8 without memory-mapped I/O were soon implemented with a system bus, which allowed modules to be plugged into any slot. Some authors called this a new streamlined "model" of computer architecture. Many early microcomputers (with a CPU generally on a single integrated circuit ) were built with

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