The KR580VM80A ( Russian : КР580ВМ80А ) is a Soviet microprocessor , a clone of the Intel 8080 CPU . Different versions of this CPU were manufactured beginning in the late 1970s, the earliest known use being in the SM1800 computer in 1979. Initially called the K580IK80 (К580ИК80), it was produced in a 48-pin planar metal-ceramic package. Later, a version in a PDIP-40 package was produced and was named the KR580IK80A (КР580ИК80А). The pin layout of the latter completely matched that of Intel's 8080A CPU. In 1986 this CPU received a new part number to conform with the 1980 Soviet integrated circuit designation and became known as the KR580VM80A (КР580ВМ80А), the number it is most widely known by today (the KR580VV51A and KR580VV55A peripheral devices went through similar revisions). Normal clock frequency for the K580IK80A is 2 MHz, with speeds up to 2.5 MHz for the KR580VM80A. The KR580IK80A was manufactured in a 6 μm process. In the later KR580VM80A the feature size was reduced to 5 μm and the die became 20% smaller.
54-415: The KR580VM80A was manufactured with an n-MOS process. The pins were electrically compatible with TTL logic levels. The load capacity of each output pin was sufficient for one TTL input. The output capacitance of each control and data pins was ≤ 100 pF each. The family consists of the following chips: For brevity, the table above lists only the chip variants in a plastic DIP (prefix КР ) as well as
108-550: A p-type transistor body. This inversion layer, called the n-channel, can conduct electrons between n-type source and drain terminals. The n-channel is created by applying voltage to the third terminal, called the gate . Like other MOSFETs, nMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active), and velocity saturation. NMOS AND-by-default logic can produce unusual glitches or buggy behavior in NMOS components, such as
162-419: A " latch " circuit. Latching circuitry is used in static random-access memory . More complicated designs that use clock signals and that change only on a rising or falling edge of the clock are called edge-triggered " flip-flops ". Formally, a flip-flop is called a bistable circuit , because it has two stable states which it can maintain indefinitely. The combination of multiple flip-flops in parallel, to store
216-533: A 4-bit counter to a large-scale circuit such as a microprocessor. IEC 617-12 and its renumbered successor IEC 60617-12 do not explicitly show the "distinctive shape" symbols, but do not prohibit them. These are, however, shown in ANSI/IEEE Std 91 (and 91a) with this note: "The distinctive-shape symbol is, according to IEC Publication 617, Part 12, not preferred, but is not considered to be in contradiction to that standard." IEC 60617-12 correspondingly contains
270-493: A continuous metallic path for current to flow (in either direction) between its input and its output. The semiconductor logic gate, on the other hand, acts as a high- gain voltage amplifier , which sinks a tiny current at its input and produces a low-impedance voltage at its output. It is not possible for current to flow between the output and the input of a semiconductor logic gate. For small-scale logic, designers now use prefabricated logic gates from families of devices such as
324-479: A high speed with low power dissipation. Other types of logic gates include, but are not limited to: A three-state logic gate is a type of logic gate that can have three different outputs: high (H), low (L) and high-impedance (Z). The high-impedance state plays no role in the logic, which is strictly binary. These devices are used on buses of the CPU to allow multiple chips to send data. A group of three-states driving
378-417: A line with a suitable control circuit is basically equivalent to a multiplexer , which may be physically distributed over separate devices or plug-in cards. In electronics, a high output would mean the output is sourcing current from the positive power terminal (positive voltage). A low output would mean the output is sinking current to the negative power terminal (zero voltage). High impedance would mean that
432-496: A molecular scale. Various types of fundamental logic gates have been constructed using molecules ( molecular logic gates ), which are based on chemical inputs and spectroscopic outputs. Logic gates have been made out of DNA (see DNA nanotechnology ) and used to create a computer called MAYA (see MAYA-II ). Logic gates can be made from quantum mechanical effects, see quantum logic gate . Photonic logic gates use nonlinear optical effects. In principle any method that leads to
486-613: A multiple-bit value, is known as a register. When using any of these gate setups the overall system has memory; it is then called a sequential logic system since its output can be influenced by its previous state(s), i.e. by the sequence of input states. In contrast, the output from combinational logic is purely a combination of its present inputs, unaffected by the previous input and output states. These logic circuits are used in computer memory . They vary in performance, based on factors of speed , complexity, and reliability of storage, and many different types of designs are used based on
540-618: A passive component such as a memory chip, and some chips such as the Motorola 68030 were hybrids with both NMOS and CMOS sections. CMOS has been near-universal in integrated circuits since the 1990s. Additionally, just like in diode–transistor logic , transistor–transistor logic , emitter-coupled logic etc., the asymmetric input logic levels make NMOS and PMOS circuits more susceptible to noise than CMOS. These disadvantages are why CMOS logic has supplanted most of these types in most high-speed digital circuits such as microprocessors despite
594-404: A resistor, so the whole circuit can be made with n-channel MOSFETs only. NMOS circuits are slow to transition from low to high. When transitioning from high to low, the transistors provide low resistance, and the capacitive charge at the output drains away very quickly (similar to discharging a capacitor through a very low resistor). But the resistance between the output and the positive supply rail
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#1732782902917648-399: A series of papers showing that two-valued Boolean algebra , which they discovered independently, can describe the operation of switching circuits. Using this property of electrical switches to implement logic is the fundamental concept that underlies all electronic digital computers . Switching circuit theory became the foundation of digital circuit design, as it became widely known in
702-507: A team at Bell Labs demonstrated a working MOS with PMOS and NMOS gates. Both types were later combined and adapted into complementary MOS (CMOS) logic by Chih-Tang Sah and Frank Wanlass at Fairchild Semiconductor in 1963. There are two sets of symbols for elementary logic gates in common use, both defined in ANSI / IEEE Std 91-1984 and its supplement ANSI/IEEE Std 91a-1991. The "distinctive shape" set, based on traditional schematics,
756-443: A technology first developed by Federico Faggin at Fairchild Semiconductor . These silicon gates are still used in most types of MOSFET based integrated circuits , although metal gates ( Al or Cu ) started to reappear in the early 2000s for certain types of high speed circuits, such as high performance microprocessors. The MOSFETs are n-type enhancement mode transistors, arranged in a so-called "pull-down network" (PDN) between
810-429: A very low resistance between the output and the negative supply, forcing the output to be low (logic 0, = False). When both A and B are high, both transistors are conductive, creating an even lower resistance path to ground. The only case where the output is high is when both transistors are off, which occurs only when both A and B are low, thus satisfying the truth table of a NOR gate: A MOSFET can be made to operate as
864-473: Is zero (or false ), the PDN will be active, meaning that at least one transistor is allowing a current path between the negative supply and the output. This causes a voltage drop over the load, and thus a low voltage at the output, representing the zero. As an example, here is a NOR gate implemented in schematic NMOS. If either input A or input B is high (logic 1, = True), the respective MOS transistor acts as
918-838: Is a device that performs a Boolean function , a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate , one that has, for instance, zero rise time and unlimited fan-out , or it may refer to a non-ideal physical device (see ideal and real op-amps for comparison). The primary way of building logic gates uses diodes or transistors acting as electronic switches . Today, most logic gates are made from MOSFETs (metal–oxide–semiconductor field-effect transistors ). They can also be constructed using vacuum tubes , electromagnetic relays with relay logic , fluidic logic , pneumatic logic , optics , molecules , acoustics, or even mechanical or thermal elements. Logic gates can be cascaded in
972-621: Is a slight difference between the two processors' interrupt handling logic, which looks like an error in the KR580VM80A's microcode . If a CALL instruction opcode is supplied during INTA cycle and the INT input remains asserted, the KR580VM80A does not clear its internal Interrupt Enable flag, despite the INTE output going inactive. As a result, the CPU enters a microcode loop, continuously acknowledging
1026-843: Is called resistor–transistor logic (RTL). Unlike simple diode logic gates (which do not have a gain element), RTL gates can be cascaded indefinitely to produce more complex logic functions. RTL gates were used in early integrated circuits . For higher speed and better density, the resistors used in RTL were replaced by diodes resulting in diode–transistor logic (DTL). Transistor–transistor logic (TTL) then supplanted DTL. As integrated circuits became more complex, bipolar transistors were replaced with smaller field-effect transistors ( MOSFETs ); see PMOS and NMOS . To reduce power consumption still further, most contemporary chip implementations of digital systems now use CMOS logic. CMOS uses complementary (both n-channel and p-channel) MOSFET devices to achieve
1080-406: Is identical to an OR function with negated inputs and outputs. Likewise, an OR function is identical to an AND function with negated inputs and outputs. A NAND gate is equivalent to an OR gate with negated inputs, and a NOR gate is equivalent to an AND gate with negated inputs. This leads to an alternative set of symbols for basic gates that use the opposite core symbol ( AND or OR ) but with
1134-470: Is much greater, so the low to high transition takes longer (similar to charging a capacitor through a high value resistor). Using a resistor of lower value will speed up the process but also increases static power dissipation. However, a better (and the most common) way to make the gates faster is to use depletion-mode transistors instead of enhancement-mode transistors as loads. This is called depletion-load NMOS logic . Logic gate A logic gate
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#17327829029171188-402: Is now possible to change the logic design of a hardware system by reprogramming some of its components, thus allowing the features or function of a hardware implementation of a logic system to be changed. An important advantage of standardized integrated circuit logic families, such as the 7400 and 4000 families, is that they can be cascaded. This means that the output of one gate can be wired to
1242-686: Is possible with the traditional symbols. The IEC standard, IEC 60617-12, has been adopted by other standards, such as EN 60617-12:1999 in Europe, BS EN 60617-12:1999 in the United Kingdom, and DIN EN 60617-12:1998 in Germany. The mutual goal of IEEE Std 91-1984 and IEC 617-12 was to provide a uniform method of describing the complex logic functions of digital circuits with schematic symbols. These functions were more complex than simple AND and OR gates. They could be medium-scale circuits such as
1296-561: Is simpler and more efficient than the sum of the individual gates. The binary number system was refined by Gottfried Wilhelm Leibniz (published in 1705), influenced by the ancient I Ching ' s binary system. Leibniz established that using the binary system combined the principles of arithmetic and logic . In an 1886 letter, Charles Sanders Peirce described how logical operations could be carried out by electrical switching circuits. Early electro-mechanical computers were constructed from switches and relay logic rather than
1350-870: Is still shown on the price list of 15 August 2022 of the "Kvazar" plant in Kyiv together with various support chips of the K580 series. Another development, the KR580VM1 ( КР580ВМ1 ), has no western equivalent. The KR580VM1 extends the Intel 8080 architecture and is binary compatible with it. The extensions differ, however, from both the Intel 8085 and the Zilog Z80. The KR580VM1 extends the address range from 64KB to 128KB. It adds two registers, H1 and L1, that can be used instead of H and L. Several 16-bit arithmetic instructions were added as well ( DAD , DSUB , DCOMP ). Just like
1404-422: Is used for simple drawings and derives from United States Military Standard MIL-STD-806 of the 1950s and 1960s. It is sometimes unofficially described as "military", reflecting its origin. The "rectangular shape" set, based on ANSI Y32.14 and other early industry standards as later refined by IEEE and IEC, has rectangular outlines for all types of gate and allows representation of a much wider range of devices than
1458-458: Is used to drive a motor when either of its inputs are brought low by a switch. The "signaled" state (motor on) occurs when either one OR the other switch is on. Unlike a regular NAND symbol, which suggests AND logic, the De Morgan version, a two negative-input OR gate, correctly shows that OR is of interest. The regular NAND symbol has a bubble at the output and none at the inputs (the opposite of
1512-459: The 6502 "illegal opcodes" which are absent in CMOS 6502s. In some cases such as Commodore's VIC-II chip, the bugs present in the chip's logic were extensively exploited by programmers for graphics effects. For many years, NMOS circuits were much faster than comparable PMOS and CMOS circuits, which had to use much slower p-channel transistors. It was also easier to manufacture NMOS than CMOS, as
1566-527: The TTL 7400 series by Texas Instruments , the CMOS 4000 series by RCA , and their more recent descendants. Increasingly, these fixed-function logic gates are being replaced by programmable logic devices , which allow designers to pack many mixed logic gates into a single integrated circuit. The field-programmable nature of programmable logic devices such as FPGAs has reduced the 'hard' property of hardware; it
1620-401: The ' propagation delay ', from a change in input of a gate to the corresponding change in its output. When gates are cascaded, the total propagation delay is approximately the sum of the individual delays, an effect which can become a problem in high-speed synchronous circuits . Additional delay can be caused when many inputs are connected to an output, due to the distributed capacitance of all
1674-562: The 1970s. CMOS circuits for contrast generate almost no heat unless the transistor count approaches 1 million. CMOS components were relatively uncommon in the 1970s-early 1980s and would typically be indicated with a "C" in the part number. Throughout the 1980s, both NMOS and CMOS parts were widely used with CMOS becoming more widespread as the decade went along. NMOS was preferred for components that performed active processing such as CPUs or graphics processors due to its higher speed and cheaper manufacturing cost as these were expensive compared to
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1728-593: The Intel 8085 and the Zilog Z80, the KR580VM1 needs only a single +5V power supply instead of the three voltages required by the KR580VM80A. The maximum clock frequency was increased from 2 MHz to 5 MHz while the power consumption was reduced from 1.35W to 0.5W, compared to the KR580VM80A. NMOS logic NMOS or nMOS logic (from N-type metal–oxide–semiconductor) uses n-type (-) MOSFETs (metal–oxide–semiconductor field-effect transistors ) to implement logic gates and other digital circuits . NMOS transistors operate by creating an inversion layer in
1782-747: The KR580VR43 ( КР580ВР43 — Intel 8243) for the K1816 family ( Intel MCS-48 ) and the KR580GF84 ( КР580ГФ84 — Intel 8284 ) / KR580VG88 ( КР580ВГ88 — Intel 8288 ) / KR580VB89 ( КР580ВБ89 — Intel 8289 ) for the K1810 family ( Intel 8086 ). Additionally, most devices in the K580 series could be used for the K1810 series as well. While the Soviet clone appears to be fully software-compatible with Intel 8080A, there
1836-417: The application. A functionally complete logic system may be composed of relays , valves (vacuum tubes), or transistors . Electronic logic gates differ significantly from their relay-and-switch equivalents. They are much faster, consume much less power, and are much smaller (all by a factor of a million or more in most cases). Also, there is a fundamental structural difference. The switch circuit creates
1890-419: The circuit is not switching, leading to high power consumption. Another disadvantage of NMOS circuits is their thermal output. Due to the need to keep constant voltage running through the circuit to hold the transistors' states, NMOS circuits can generate a considerable amount of heat in operation which can reduce the device's reliability. This was especially problematic with the early large gate process nodes in
1944-408: The electrical engineering community during and after World War II , with theoretical rigor superseding the ad hoc methods that had prevailed previously. In 1948, Bardeen and Brattain patented an insulated-gate transistor (IGFET) with an inversion layer. Their concept, forms the basis of CMOS technology today. In 1957 Frosch and Derick were able to manufacture PMOS and NMOS planar gates. Later
1998-582: The examples of its successful application are: Mirroring the development in the West, where the Intel 8080 was succeeded by the binary compatible Intel 8085 and Zilog Z80 as well as the source compatible Intel 8086 , the Soviet Union produced the IM1821VM85A ( ИМ1821ВМ85А , actually the CMOS version Intel 80C85), KR1858VM1 ( КР1858ВМ1 ), and K1810VM86 ( К1810ВМ86 ), respectively. The 580VM80
2052-399: The fact that CMOS was originally very slow compared to logic gates built with bipolar transistors . MOS stands for metal-oxide-semiconductor , reflecting the way MOS-transistors were originally constructed, predominantly before the 1970s, with gates of metal, typically aluminium. Since around 1970, however, most MOS circuits have used self-aligned gates made of polycrystalline silicon ,
2106-544: The functions of all the other logic gates, but his work on it was unpublished until 1933. The first published proof was by Henry M. Sheffer in 1913, so the NAND logical operation is sometimes called Sheffer stroke ; the logical NOR is sometimes called Peirce's arrow . Consequently, these gates are sometimes called universal logic gates . Logic gates can also be used to hold a state, allowing data storage. A storage element can be constructed by connecting several gates in
2160-414: The habit of associating the shapes exclusively as OR or AND shapes, but also take into account the bubbles at both inputs and outputs in order to determine the "true" logic function indicated. A De Morgan symbol can show more clearly a gate's primary logical purpose and the polarity of its nodes that are considered in the "signaled" (active, on) state. Consider the simplified case where a two-input NAND gate
2214-419: The inputs and outputs negated. Use of these alternative symbols can make logic circuit diagrams much clearer and help to show accidental connection of an active high output to an active low input or vice versa. Any connection that has logic negations at both ends can be replaced by a negationless connection and a suitable change of gate or vice versa. Any connection that has a negation at one end and no negation at
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2268-601: The inputs and wiring and the finite amount of current that each output can provide. There are several logic families with different characteristics (power consumption, speed, cost, size) such as: RDL (resistor–diode logic), RTL (resistor-transistor logic), DTL (diode–transistor logic), TTL (transistor–transistor logic) and CMOS. There are also sub-variants, e.g. standard CMOS logic vs. advanced types using still CMOS technology, but with some optimizations for avoiding loss of speed due to slower PMOS transistors. The simplest family of logic gates uses bipolar transistors , and
2322-413: The inputs of one or several other gates, and so on. Systems with varying degrees of complexity can be built without great concern of the designer for the internal workings of the gates, provided the limitations of each integrated circuit are considered. The output of one gate can only drive a finite number of inputs to other gates, a number called the ' fan-out limit'. Also, there is always a delay, called
2376-499: The interrupt and pushing the PC onto the stack , which leads to stack overflow . In a typical hardware configuration this phenomenon is masked by the behavior of 8259A interrupt controller, which deasserts INT during INTA cycle. The Romanian MMN8080 behaves the same as the KR580VM80A; no other 8080A clones seem to be affected by this error. The KR580VM80A was popular in home computers , computer terminals , industrial controllers . Some of
2430-668: The later innovations of vacuum tubes (thermionic valves) or transistors (from which later electronic computers were constructed). Ludwig Wittgenstein introduced a version of the 16-row truth table as proposition 5.101 of Tractatus Logico-Philosophicus (1921). Walther Bothe , inventor of the coincidence circuit , got part of the 1954 Nobel Prize in physics, for the first modern electronic AND gate in 1924. Konrad Zuse designed and built electromechanical logic gates for his computer Z1 (from 1935 to 1938). From 1934 to 1936, NEC engineer Akira Nakashima , Claude Shannon and Victor Shestakov introduced switching circuit theory in
2484-443: The latter has to implement p-channel transistors in special n-wells on the p-substrate, not prone to damage from bus conflicts, and not as vulnerable to electrostatic discharge damage. The major drawback with NMOS (and most other logic families ) is that a direct current must flow through a logic gate even when the output is in a steady state (low in the case of NMOS). This means static power dissipation , i.e. power drain even when
2538-442: The logic gate output and negative supply voltage (typically the ground). A pull up (i.e. a "load" that can be thought of as a resistor, see below) is placed between the positive supply voltage and each logic gate output. Any logic gate , including the logical inverter , can then be implemented by designing a network of parallel and/or series circuits, such that if the desired output for a certain combination of boolean input values
2592-412: The note (Section 2.1) "Although non-preferred, the use of other symbols recognized by official national standards, that is distinctive shapes in place of symbols [list of basic gates], shall not be considered to be in contradiction with this standard. Usage of these other symbols in combination to form complex symbols (for example, use as embedded symbols) is discouraged." This compromise was reached between
2646-454: The original planar package (prefix К ). Not listed separately are variants in a ceramic DIP (prefix КМ for commercial version and prefix М or no prefix for the military version) or export variants (prefix ЭКР ) in a plastic DIP but with a pin spacing of one tenth of an inch. For the KR580VM1 ( КР580ВМ1 ) see Further development below. Several integrated circuits in the K580 series were actually intended for other microprocessor families:
2700-413: The other can be made easier to interpret by instead using the De Morgan equivalent symbol at either of the two ends. When negation or polarity indicators on both ends of a connection match, there is no logic negation in that path (effectively, bubbles "cancel"), making it easier to follow logic states from one symbol to the next. This is commonly seen in real logic diagrams – thus the reader must not get into
2754-542: The output is effectively disconnected from the circuit. Non-electronic implementations are varied, though few of them are used in practical applications. Many early electromechanical digital computers, such as the Harvard Mark I , were built from relay logic gates, using electro-mechanical relays . Logic gates can be made using pneumatic devices, such as the Sorteberg relay or mechanical logic gates, including on
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#17327829029172808-694: The respective IEEE and IEC working groups to permit the IEEE and IEC standards to be in mutual compliance with one another. In the 1980s, schematics were the predominant method to design both circuit boards and custom ICs known as gate arrays . Today custom ICs and the field-programmable gate array are typically designed with Hardware Description Languages (HDL) such as Verilog or VHDL . [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] [REDACTED] By use of De Morgan's laws , an AND function
2862-602: The same way that Boolean functions can be composed, allowing the construction of a physical model of all of Boolean logic , and therefore, all of the algorithms and mathematics that can be described with Boolean logic. Logic circuits include such devices as multiplexers , registers , arithmetic logic units (ALUs), and computer memory , all the way up through complete microprocessors , which may contain more than 100 million logic gates. Compound logic gates AND-OR-Invert (AOI) and OR-AND-Invert (OAI) are often employed in circuit design because their construction using MOSFETs
2916-485: The states that will turn the motor on), but the De Morgan symbol shows both inputs and output in the polarity that will drive the motor. De Morgan's theorem is most commonly used to implement logic gates as combinations of only NAND gates, or as combinations of only NOR gates, for economic reasons. Output comparison of various logic gates: Charles Sanders Peirce (during 1880–1881) showed that NOR gates alone (or alternatively NAND gates alone ) can be used to reproduce
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