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The Low Pin Count ( LPC ) bus is a computer bus used on IBM-compatible personal computers to connect low-bandwidth devices to the CPU , such as the BIOS ROM (BIOS ROM was moved to the Serial Peripheral Interface (SPI) bus in 2006), "legacy" I/O devices (integrated into Super I/O , Embedded Controller , CPLD , and/or IPMI chip), and Trusted Platform Module (TPM). "Legacy" I/O devices usually include serial and parallel ports, PS/2 keyboard , PS/2 mouse , and floppy disk controller .

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67-564: Most PC motherboards with an LPC bus have either a Platform Controller Hub (PCH) or a southbridge chip, which acts as the host and controls the LPC bus. All other devices connected to the physical wires of the LPC bus are peripherals. The LPC bus was introduced by Intel in 1998 as a software-compatible substitute for the Industry Standard Architecture (ISA) bus. It resembles ISA to software, although physically it

134-427: A BIOS , as did the boot ROM on the original IBM PC, or UEFI . UEFI is a successor to BIOS that became popular after Microsoft began requiring it for a system to be certified to run Windows 8 . When the computer is powered on, the boot firmware tests and configures memory, circuitry, and peripherals. This Power-On Self Test (POST) may include testing some of the following things: Wait state A wait state

201-615: A water cooling system instead of many fans. Some small form factor computers and home theater PCs designed for quiet and energy-efficient operation boast fan-less designs. This typically requires the use of a low-power CPU, as well as a careful layout of the motherboard and other components to allow for heat sink placement. A 2003 study found that some spurious computer crashes and general reliability issues, ranging from screen image distortions to I/O read/write errors, can be attributed not to software or peripheral hardware but to aging capacitors on PC motherboards. Ultimately this

268-495: A "cycle type/direction" (CTDIR) field: two bits indicating the type (I/O, memory, or DMA) and one bit indicating the direction (read from device, or write to device) of the transfer to follow. This is followed by the transfer address field, whose size depends on the type of cycle: Memory and I/O accesses are allowed as single-byte accesses only, and operate as described in § Transactoin structure :: address, data from host if write, turnaround, SYNC, data from device if read. If

335-788: A 16-bit memory or I/O cycle asserted a signal that told the bus that it could accept the requested 16-bit transfer without assistance from an ISA cycle splitter. ISA-style bus mastering has been replaced in the LPC bus with a bus mastering protocol that does not rely on the ISA-style DMA controllers at all. This was done in order to remove ISA's limit on what type of bus master cycles a device is allowed to initiate on which DMA channel. The ISA-style bus cycles that were inherited by LPC from ISA are one-byte host-initiated I/O bus cycles, one-byte host-initiated memory cycles, and one- or two-byte host-initiated ISA-style DMA cycles. However, some non-ISA bus cycles were added. Cycles that were added to improve

402-599: A 24-bit memory address when performing a memory transfer, requires the use of an ISA-style DMA channel, and cannot perform 32-bit transfers. Trusted Platform Module 2.0 specifications define special TPM-Read cycles and TPM-Write cycles that are based on the I/O Read and the I/O Write cycles. These cycles use a START field with the formerly-reserved value of 0101, followed by a CTDIR nibble and 16-bit I/O address just like an ISA-compatible write. These cycles are used when using

469-486: A DMA transfer is requested), and a final 1 stop bit. The host responds by performing a DMA cycle at the next available opportunity. DMA cycles are named based on the direction of memory access, so a "read" is a transfer to the LPC device, and a "write" is a transfer from the LPC device. The "address" consists of 6 bits sent as two nibbles: a 3-bit channel number and 1-bit terminal count indication (the ISA bus's TC pin, or

536-1003: A TPM's locality facility. The LPC bus specification limits what type of peripherals may be connected to it. It only allows devices that belong to the following classes of devices: super I/O devices, nonvolatile BIOS memory , firmware hubs, audio devices, and embedded controllers. Furthermore, each class is restricted on which bus cycles are allowed for each class. Super I/O devices and audio devices are allowed to accept I/O cycles, accept ISA-style third-party DMA cycles, and generate bus master cycles. Generic-application memory devices like nonvolatile BIOS memory and LPC flash devices are allowed to accept memory cycles. Firmware hubs are allowed to accept firmware memory cycles. Embedded controllers are allowed to accept I/O cycles and generate bus master cycles. Some ISA cycles that were deemed not useful to these classes were removed. They include host-initiated two-byte memory cycles and host-initiated two-byte I/O cycles. These removed transfer types could be initiated by

603-439: A card-cage case with components connected by a backplane containing a set of interconnected sockets into which the circuit boards are plugged. In very old designs, copper wires were the discrete connections between card connector pins, but printed circuit boards soon became the standard practice. The central processing unit (CPU), memory, and peripherals were housed on individually printed circuit boards, which were plugged into

670-457: A deassertion of the corresponding emulated DMA request signal; the host will stop DMA after the immediately following byte until the device makes another DMA request via the LDRQ# signal. A SYNC pattern of 1001 indicates that the host should consider he device's DMA request still active; the host will continue with any remaining bytes in this transfer or start another transfer, as appropriate, without

737-406: A different number of connections depending on its standard and form factor . A standard, modern ATX motherboard will typically have two or three PCI-Express x16 connection for a graphics card, one or two legacy PCI slots for various expansion cards, and one or two PCI-E x1 (which has superseded PCI ). A standard EATX motherboard will have two to four PCI-E x16 connection for graphics cards, and

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804-444: A given DMA channel number, and the host performs a DMA access on the LPC bus. The request is made by a virtual ISA-compatible DMA request (DRQ) line, which is emulated using the device's LDRQ# signal to indicate transitions on the emulated DRQ line. This is done with 6-bit requests on the LDRQ# signal: a 0 start bit, the 3-bit DMA channel number (most significant bit first), one bit of new request level (almost always 1, indicating that

871-472: A lifetime of 3 to 4 years can be expected. However, many manufacturers deliver substandard capacitors, which significantly reduce life expectancy. Inadequate case cooling and elevated temperatures around the CPU socket exacerbate this problem. With top blowers, the motherboard components can be kept under 95 °C (203 °F), effectively doubling the motherboard lifetime. Mid-range and high-end motherboards, on

938-555: A peripheral device. If no peripheral device containing an operating system was available, then the computer would perform tasks from other ROM stores or display an error message, depending on the model and design of the computer. For example, both the Apple II and the original IBM PC had Cassette BASIC (ROM BASIC) and would start that if no operating system could be loaded from the floppy disk or hard disk. The boot firmware in modern IBM PC compatible motherboard designs contains either

1005-448: A separate component. Business PCs, workstations, and servers were more likely to need expansion cards, either for more robust functions, or for higher speeds; those systems often had fewer embedded components. Laptop and notebook computers that were developed in the 1990s integrated the most common peripherals. This even included motherboards with no upgradeable components, a trend that would continue as smaller systems were introduced after

1072-456: A separate request via LDRQ#. For a DMA write, where data is transferred from the device, the SYNC field is followed by the 8 bits of data and another SYNC field, until the host-specified length for this transfer is reached, or the device stops the transfer. A two-cycle turnaround field completes the transaction. For a DMA read, where data is transferred to the device, the SYNC field is followed by

1139-412: A set of low-speed peripherals: PS/2 keyboard and mouse , floppy disk drive , serial ports , and parallel ports . By the late 1990s, many personal computer motherboards included consumer-grade embedded audio, video, storage, and networking functions without the need for any expansion cards at all; higher-end systems for 3D gaming and computer graphics typically retained only the graphics card as

1206-459: A single flash memory chip directly connected to the LPC bus, as an alternative to a Parallel ATA port. A CPLD or FPGA can implement an LPC host or peripheral. The original Xbox game console has an LPC debug port that can be used to force the Xbox to boot new code. All ISA-compatible LPC bus transactions use START code of 0000. During the first cycle with LFRAME# high again, the host drives

1273-482: A turnaround, and the data—turnaround—sync—turnaround sequence repeats for each byte transferred. Interrupts are transmitted over a single shared SERIRQ line using the "serialized interrupts for PCI" protocol originally developed for the PCI bus. The host periodically sends interrupt packets, within which each interrupt request is assigned a 1-clock time slot, separated by 2-clock turnaround cycles. The initial synchronization

1340-433: A typical number: 16 ISA-compatible interrupts (IRQ0–IRQ15), plus NMI . After the final interrupt slot, the host appends a "stop" signal consisting of two or three low cycles followed by two turnaround cycles. In "continuous" mode, the host periodically initiates a new packet. There is also a "quiet" mode in which a device requests a new packet by driving SERIRQ low for one clock cycle. The host then continues driving

1407-433: A variety of other custom components. Similarly, the term mainboard describes a device with a single board and no additional expansions or capability, such as controlling boards in laser printers, television sets, washing machines, mobile phones, and other embedded systems with limited expansion abilities. Prior to the invention of the microprocessor , the CPU of a digital computer consisted of multiple circuit boards in

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1474-704: A variety of sizes and shapes called form factors , some of which are specific to individual computer manufacturers. However, the motherboards used in IBM-compatible systems are designed to fit various case sizes. As of 2024 , most desktop computer motherboards use the ATX standard form factor — even those found in Macintosh and Sun computers, which have not been built from commodity components. A case's motherboard and power supply unit (PSU) form factor must all match, though some smaller form factor motherboards of

1541-515: A varying number of PCI and PCI-E x1 slots. It can sometimes also have a PCI-E x4 slot (will vary between brands and models). Some motherboards have two or more PCI-E x16 slots, to allow more than 2 monitors without special hardware, or use a special graphics technology called SLI (for Nvidia ) and Crossfire (for AMD ). These allow 2 to 4 graphics cards to be linked together, to allow better performance in intensive graphical computing tasks, such as gaming, video editing, etc. In newer motherboards,

1608-413: Is 100% successful, but together can significantly reduce the problem. Wait states can be used to reduce the energy consumption of a processor, by allowing the main processor clock to either slow down or temporarily pause during the wait state if the CPU has no other work to do. Rather than spinning uselessly in a tight loop waiting for data, sporadically reducing the clock speed in this manner helps to keep

1675-406: Is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond. Computer microprocessors generally run much faster than the computer's other subsystems, which hold the data the CPU reads and writes. Even memory, the fastest of these, cannot supply data as fast as the CPU could process it. In an example from 2011, typical PC processors like

1742-463: Is done by the host. As a simplified example: The devices can recognize the beginning of the frame because only the host will ever drive the line low for more than one cycle. The host identifies the interrupt by counting the number of clocks cycles: if it sees the SERIRQ line driven low at the eighteenth clock, then IRQ 18/3=6 is asserted. The number of interrupt slots is system-specific, with 17 being

1809-469: Is no standardized connector in common use, though Intel defines one for use for debug modules. A small number of LPC peripheral daughterboards are available, with pinouts proprietary to the motherboard vendor: Trusted Platform Modules (TPMs), POST cards for displaying BIOS diagnostic codes, and ISA-compatible serial port peripherals for industrial use. Device discovery is not supported; since only motherboard devices or specific models of TPM are connected,

1876-402: Is quite different. The ISA bus has a 16-bit data bus and a 24-bit address bus that can be used for both 16-bit I/O port addresses and 24-bit memory addresses; both run at speeds up to 8.33  MHz . The LPC bus uses a heavily multiplexed four-bit -wide bus operating at four times the clock speed (33.3 MHz) to transfer addresses and data with similar performance. LPC's main advantage

1943-421: Is that the basic bus requires only seven signals, greatly reducing the number of pins required on peripheral chips. An integrated circuit using LPC will need 30 to 72 fewer pins than its ISA equivalent. This also makes the bus easier to route on crowded modern motherboards. The clock rate was chosen to match that of PCI in order to further ease integration. Also, LPC is intended to be a motherboard-only bus; there

2010-415: Is the main printed circuit board (PCB) in general-purpose computers and other expandable systems. It holds and allows communication between many of the crucial electronic components of a system, such as the central processing unit (CPU) and memory , and provides connectors for other peripherals . Unlike a backplane , a motherboard usually contains significant sub-systems, such as the central processor,

2077-406: Is usually more expensive than a desktop motherboard. A CPU socket (central processing unit) or slot is an electrical component that attaches to a printed circuit board (PCB) and is designed to house a CPU (also called a microprocessor). It is a special type of integrated circuit socket designed for very high pin counts. A CPU socket provides many functions, including a physical structure to support

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2144-704: The Apple II and IBM PC include only this minimal peripheral support on the motherboard. Occasionally video interface hardware was also integrated into the motherboard; for example, on the Apple II and rarely on IBM-compatible computers such as the IBM PCjr . Additional peripherals such as disk controllers and serial ports were provided as expansion cards. Given the high thermal design power of high-speed computer CPUs and components, modern motherboards nearly always include heat sinks and mounting points for fans to dissipate excess heat. Motherboards are produced in

2211-477: The Apple II and IBM PC used ROM chips mounted in sockets on the motherboard. At power-up, the central processor unit would load its program counter with the address of the Boot ROM and start executing instructions from the Boot ROM. These instructions initialized and tested the system hardware, displayed system information on the screen, performed RAM checks, and then attempts to boot an operating system from

2278-479: The IBM PC/AT architecture, such as the two programmable interrupt controllers , the programmable interval timer , and two ISA DMA controllers , which are all involved in " ISA-style DMA ". ISA-compatible DMA uses an Intel 8237-compatible DMA controller on the host, which keeps track of the location and length of the memory buffer, as well as the direction of the transfer. The device simply requests service from

2345-529: The Intel Core 2 and the AMD Athlon 64 X2 run with a clock of several GHz , which means that one clock cycle is less than 1 nanosecond (typically about 0.3 ns to 0.5 ns on modern desktop CPUs), while main memory has a latency of about 15–30 ns. Some second-level CPU caches run slower than the processor core. When the processor needs to access external memory, it starts placing the address of

2412-429: The M.2 slots are for SSD and/or wireless network interface controller . Motherboards are generally air cooled with heat sinks often mounted on larger chips in modern motherboards. Insufficient or improper cooling can cause damage to the internal components of the computer, or cause it to crash . Passive cooling , or a single fan mounted on the power supply , was sufficient for many desktop computer CPU's until

2479-482: The chipset 's input/output and memory controllers, interface connectors, and other components integrated for general use. Motherboard means specifically a PCB with expansion capabilities. As the name suggests, this board is often referred to as the mother of all components attached to it, which often include peripherals, interface cards, and daughterboards : sound cards , video cards , network cards , host bus adapters , TV tuner cards , IEEE 1394 cards, and

2546-413: The 16- and 128-byte firmware read cycles, which have 17 cycles of overhead but 32 and 256 cycles (respectively) of data transfer, achieving throughputs of 10.88 and 15.63  MB/s . The next fastest bus cycle defined in the standard, the 32-bit ISA-style DMA write cycle, spends only 8 of 20 total clock cycles transferring data (the other 12 cycles are overhead), achieving up to 6.67 MB/s. One of

2613-429: The 8237's EOP# output), followed by a 2-bit transfer size. By default, DMA channels 0–3 perform 8-bit transfers, and channels 5–7 perform 16-bit transfers; but an LPC-specific extension allows 1-, 2-, or 4-byte transfers on any channel. When a multi-byte transfer is performed, each byte has its own SYNC field, as described below. A normal SYNC "ready" pattern of 0000 (or an error pattern of 1010) also causes

2680-420: The CPU series and speed. With the steadily declining costs and size of integrated circuits , it is now possible to include support for many peripherals on the motherboard. By combining many functions on one PCB , the physical size and total cost of the system may be reduced; highly integrated motherboards are thus especially popular in small form factor and budget computers. A typical motherboard will have

2747-522: The CPU, support for a heat sink, facilitating replacement (as well as reducing cost), and most importantly, forming an electrical interface both with the CPU and the PCB. CPU sockets on the motherboard can most often be found in most desktop and server computers (laptops typically use surface mount CPUs), particularly those based on the Intel x86 architecture. A CPU socket type and motherboard chipset must support

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2814-574: The backplane. In older microprocessor-based systems, the CPU and some support circuitry would fit on a single CPU board, with memory and peripherals on additional boards, all plugged into the backplane. The ubiquitous S-100 bus of the 1970s is an example of this type of backplane system. The most popular computers of the 1980s such as the Apple II and IBM PC had published schematic diagrams and other documentation which permitted rapid reverse engineering and third-party replacement motherboards. Usually intended for building new computers compatible with

2881-441: The bus on the third cycle. LPC operations spend a large fraction of their time performing such turn-arounds. As mentioned, the LPC bus is designed to have performance similar to the ISA bus. The exact data transfer rates depend on the type of bus access (I/O, memory, DMA , firmware ) performed and by the speed of the host and the LPC device. All bus cycles spend a majority of their time in overhead rather than data transfer—except

2948-456: The bus to the device requesting the bus master DMA cycle. Following the turnaround cycles, the transfer proceeds very much like a host-initiated ISA-compatible transfer with the roles reversed: This differs from 16-bit ISA bus mastering because LPC bus mastering requires a 32-bit memory address when performing a memory transfer, does not use an ISA-style DMA channel, and can support 8, 16, or 32-bit transfers; while 16-bit ISA bus mastering requires

3015-414: The exemplars, many motherboards offered additional performance or other features and were used to upgrade the manufacturer's original equipment. During the late 1980s and early 1990s, it became economical to move an increasing number of peripheral functions onto the motherboard. In the late 1980s, personal computer motherboards began to include single ICs (also called Super I/O chips) capable of supporting

3082-464: The firmware (BIOS) to be located outside the usual peripheral address space. These transfers are similar to ISA-compatible transfers, except that: Up to two devices on an LPC bus can request a bus master transfer by using the LDRQ# signal to request use of the reserved DMA channel 4. In this case, the host will begin a transfer with a special START field of 0010 for bus master 0 or 0011 for bus master 1, followed immediately by two turnaround cycles to hand

3149-439: The first two is mandatory for the host: The LPC bus derives its electrical conventions from those of conventional PCI . In particular, it shares the restriction that two idle cycles are required to "turn around" any bus signal so that a different device is "speaking". In the first, the bus is actively driven high. In the second, the bus is undriven and held high by the pull-up resistors. A new device may begin sending data over

3216-448: The following bus transaction. Normally, the host only holds LFRAME# low for a single clock cycle, for efficiency. An exception is the abort transaction, which may begin even in the middle of another operation. The host pulls LFRAME# low for a minimum of four clock cycles, during which any devices must cease to drive the LAD bus. On the fourth cycle, the host drives LAD high (to 1111). Upon

3283-475: The high-to-low transition of LFRAME#, the bus is reset to an idle state. In almost all other cases, LPC transactions use the following general structure: DMA transfers differ somewhat. § ISA-compatible DMA may have multiple SYNC and data phases. § Bus master DMA has a bus turnaround immediately following the START code and no final turnaround, The SYNC phase allows the device to insert wait states in

3350-457: The host and controls the LPC bus. It also acts as the central DMA controller for devices on that bus if the memory controller is in the chipset. In CPUs that contain their own memory controller(s), the DMA controller is located in the CPU. For compatibility with software originally written for systems with the ISA bus, the DMA controller contains the circuit equivalents of "legacy" onboard peripherals of

3417-419: The host attempts a transfer to an unused address, no device will drive the SYNC cycles and the host will see 1111 on the LAD bus. After seeing three cycles of 1111 (two cycles are allowed, in addition to the two turn-around cycles, for a slow device to decode the address and begin driving SYNC patterns), the host will abort the operation. The Platform Controller Hub (PCH) chip or the southbridge chip acts as

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3484-528: The host firmware (BIOS, UEFI ) image will include a static description of any devices and their I/O addresses expected to be present on a particular motherboard. LPC control signals are active-low , as indicated by the "#" symbol in their names. Signals are divided into three categories: The LPC specification defines seven mandatory signals required for bidirectional data transfer: There are six additional signals defined, which are optional for LPC devices that do not require their functionality, but support for

3551-409: The host on ISA buses but not on LPC buses. The host would have to simulate two-byte cycles by splitting them up into two one-byte cycles. The ISA bus has a similar concept because the original 8-bit ISA bus required 16-bit cycles to be split up. Therefore, the 16-bit ISA bus automatically split 16-bit cycles into 8-bit cycles for the benefit of 8-bit ISA peripherals unless the ISA device being targeted by

3618-460: The late 1990s; since then, most have required CPU fans mounted on heat sinks , due to rising clock speeds and power consumption. Most motherboards have connectors for additional computer fans and integrated temperature sensors to detect motherboard and CPU temperatures and controllable fan connectors which the BIOS or operating system can use to regulate fan speed. Alternatively computers can use

3685-555: The line low for the other seven clocks. From this point on, the protocol is the same. The mode is controlled by the length of the host's stop signal at the end of each packet. If it consists of three clocks of low signal, continuous mode follows and only the host may begin a new packet. If the stop signal consists of two low clocks, quiet mode follows and any device may initiate an interrupt packet. START field values other than 0000 or 1111 are used to indicate various non-ISA-compatible transfers. The supported transfers are: This allows

3752-433: The motherboard cooling and monitoring solutions are usually based on a super I/O chip or an embedded controller . Motherboards contain a ROM (and later EPROM , EEPROM , NOR flash ) that stores firmware that initializes hardware devices and boots an operating system from a peripheral device . The terms bootstrapping and boot come from the phrase "lifting yourself by your bootstraps". Microcomputers such as

3819-419: The motherboard. Other components such as external storage , controllers for video display and sound , and peripheral devices may be attached to the motherboard as plug-in cards or via cables; in modern microcomputers, it is increasingly common to integrate some of these peripherals into the motherboard itself. An important component of a motherboard is the microprocessor's supporting chipset , which provides

3886-443: The other hand, use solid capacitors exclusively. For every 10 °C less, their average lifespan is multiplied approximately by three, resulting in a 6-times higher lifetime expectancy at 65 °C (149 °F). These capacitors may be rated for 5000, 10000 or 12000 hours of operation at 105 °C (221 °F), extending the projected lifetime in comparison with standard solid capacitors. In desktop PCs and notebook computers,

3953-1070: The performance of devices beside firmware hubs include LPC-style one-, two-, and four-byte bus master memory cycles; one-, two-, and four-byte bus master I/O cycles; and 32-bit third-party DMA which conforms to all of the restrictions of ISA-style third-party DMA except for the fact that it can do 32-bit transfers. Any device that is allowed to accept traditional ISA-style DMA is also allowed to use this 32-bit ISA-style DMA. The host could initiate 32-bit ISA-style DMA cycles, while peripherals could initiate bus master cycles. Firmware hubs consumed firmware cycles that were designed just for firmware hubs so that firmware addresses and normal memory-mapped I/O addresses could overlap without conflict. Firmware memory reads could read 1, 2, 4, 16, or 128 bytes at once. Firmware memory writes could write one, two or four bytes at once. Motherboard A motherboard (also called mainboard , main circuit board , MB , base board , system board , or, in Apple computers, logic board )

4020-455: The processor core cool and to extend battery life in portable computing devices. On IBM mainframes , the term wait state is used with a different meaning. A wait state refers to a CPU being halted, possibly due to some kind of serious error condition (such as an unrecoverable error during operating system to IPL ). A wait state is indicated by bit 14 of the PSW being set to 1, with other bits of

4087-478: The requested information on the address bus . It then must wait for the answer, that may come back tens if not hundreds of cycles later. Each of the cycles spent waiting is called a wait state. Wait states are a pure waste of a processor's performance. Modern designs try to eliminate or hide them using a variety of techniques: CPU caches , instruction pipelines , instruction prefetch , branch prediction , simultaneous multithreading and others. No single technique

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4154-406: The same family will fit larger cases. For example, an ATX case will usually accommodate a microATX motherboard. Laptop computers generally use highly integrated, miniaturized, and customized motherboards. This is one of the reasons that laptop computers are difficult to upgrade and expensive to repair. Often the failure of one laptop component requires the replacement of the entire motherboard, which

4221-405: The slowest bus cycles is a simple memory read or write, where only 2 of the 17 clock cycles (plus any wait states imposed by the device) transfer data, for a transfer rate of 1.96 MB/s. LPC transactions begin on a low-to-high transition of LFRAME#. While LFRAME# is low, the host places a 4-bit START code on the LAD lines. The code sent on the last cycle before LFRAME# transitions high defines

4288-405: The supporting interfaces between the CPU and the various buses and external components. This chipset determines, to an extent, the features and capabilities of the motherboard. Modern motherboards include: Additionally, nearly all motherboards include logic and connectors to support commonly used input devices, such as USB for mouse devices and keyboards . Early personal computers such as

4355-435: The transaction. There are six possible SYNC values, all with even parity (even Hamming weight ). Three of them end the SYNC phase, while the other three cause the host to wait for another SYNC nibble: Intel designed the LPC bus so that the system BIOS image could be stored in a single flash memory chip directly connected to the LPC bus. Intel also made it possible to put operating system images and software applications on

4422-507: The turn of the century (like the tablet computer and the netbook ). Memory, processors, network controllers, power source, and storage would be integrated into some systems. A motherboard provides the electrical connections by which the other components of the system communicate. Unlike a backplane, it also contains the central processing unit and hosts other subsystems and devices. A typical desktop computer has its microprocessor , main memory , and other essential components connected to

4489-679: Was shown to be the result of a faulty electrolyte formulation, an issue termed capacitor plague . Modern motherboards use electrolytic capacitors to filter the DC power distributed around the board. These capacitors age at a temperature-dependent rate, as their water based electrolytes slowly evaporate. This can lead to loss of capacitance and subsequent motherboard malfunctions due to voltage instabilities. While most capacitors are rated for 2000 hours of operation at 105 °C (221 °F), their expected design life roughly doubles for every 10 °C (18 °F) below this. At 65 °C (149 °F)

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