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69-670: MOS Technology, Inc. ("MOS" being short for Metal Oxide Semiconductor ), later known as CSG (Commodore Semiconductor Group) and GMT Microelectronics , was a semiconductor design and fabrication company based in Audubon, Pennsylvania . It is most famous for its 6502 microprocessor and various designs for Commodore International 's range of home computers . Three former General Instrument executives, John Paivinen, Mort Jaffe and Don McLaughlin, formed MOS Technology in Valley Forge, Pennsylvania in 1969. The Allen-Bradley Company

138-429: A depletion layer by forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions (see doping ). If V G is high enough, a high concentration of negative charge carriers forms in an inversion layer located in a thin layer next to the interface between the semiconductor and the insulator. Conventionally,

207-497: A pure-play semiconductor foundry , so they had to join a chip-building company to produce their new CPU. MOS was a small firm with good credentials in the right area, the east coast of the US. The team of four design engineers was headed by Chuck Peddle and included Bill Mensch . At MOS they set about building a new CPU that would outperform the 6800 while being similar to it in purpose and much less expensive. The resulting 6501 design

276-564: A MOSFET. In the case of a p-type MOSFET, bulk inversion happens when the intrinsic energy level at the surface becomes smaller than the Fermi level at the surface. This can be seen on a band diagram. The Fermi level defines the type of semiconductor in discussion. If the Fermi level is equal to the Intrinsic level, the semiconductor is of intrinsic, or pure type. If the Fermi level lies closer to

345-535: A bipolar transistor. The subthreshold I–V curve depends exponentially upon threshold voltage, introducing a strong dependence on any manufacturing variation that affects threshold voltage; for example: variations in oxide thickness, junction depth, or body doping that change the degree of drain-induced barrier lowering. The resulting sensitivity to fabricational variations complicates optimization for leakage and performance. When V GS > V th and V DS < V GS  − V th : The transistor

414-404: A buried oxide is formed below a thin semiconductor layer. If the channel region between the gate dielectric and the buried oxide region is very thin, the channel is referred to as an ultrathin channel region with the source and drain regions formed on either side in or above the thin semiconductor layer. Other semiconductor materials may be employed. When the source and drain regions are formed above

483-485: A few minor differences: an added on-chip clock oscillator, a different functional pinout arrangement, generation of the SYNC signal (supporting single-instruction stepping), and removal of data bus enablement control signals (DBE and BA, with the former directly connected to the phase 2 clock instead). It outperformed the more-complex 6800 and Intel 8080 , but cost much less and was easier to work with. Although it did not have

552-476: A long-channel device, there is no drain voltage dependence of the current once V DS ≫ V T {\displaystyle V_{\text{DS}}\gg V_{\text{T}}} , but as channel length is reduced drain-induced barrier lowering introduces drain voltage dependence that depends in a complex way upon the device geometry (for example, the channel doping, the junction doping and so on). Frequently, threshold voltage V th for this mode

621-480: A silicon MOS transistor in 1959 and successfully demonstrated a working MOS device with their Bell Labs team in 1960. Their team included E. E. LaBate and E. I. Povilonis who fabricated the device; M. O. Thurston, L. A. D’Asaro, and J. R. Ligenza who developed the diffusion processes, and H. K. Gummel and R. Lindner who characterized the device. This was a culmination of decades of field-effect research that began with Lilienfeld. The first MOS transistor at Bell Labs

690-748: Is a weak-inversion current, sometimes called subthreshold leakage. In weak inversion where the source is tied to bulk, the current varies exponentially with V GS {\displaystyle V_{\text{GS}}} as given approximately by: I D ≈ I D0 e V GS − V th n V T , {\displaystyle I_{\text{D}}\approx I_{\text{D0}}e^{\frac {V_{\text{GS}}-V_{\text{th}}}{nV_{\text{T}}}},} where I D0 {\displaystyle I_{\text{D0}}} = current at V GS = V th {\displaystyle V_{\text{GS}}=V_{\text{th}}} ,

759-714: Is defined as the gate voltage at which a selected value of current I D0 occurs, for example, I D0 = 1   μA, which may not be the same V th -value used in the equations for the following modes. Some micropower analog circuits are designed to take advantage of subthreshold conduction. By working in the weak-inversion region, the MOSFETs in these circuits deliver the highest possible transconductance-to-current ratio, namely: g m / I D = 1 / ( n V T ) {\displaystyle g_{m}/I_{\text{D}}=1/\left(nV_{\text{T}}\right)} , almost that of

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828-415: Is equivalent to a planar capacitor , with one of the electrodes replaced by a semiconductor. When a voltage is applied across a MOS structure, it modifies the distribution of charges in the semiconductor. If we consider a p-type semiconductor (with N A the density of acceptors , p the density of holes; p = N A in neutral bulk), a positive voltage, V G , from gate to body (see figure) creates

897-501: Is the charge-carrier effective mobility, W {\displaystyle W} is the gate width, L {\displaystyle L} is the gate length and C ox {\displaystyle C_{\text{ox}}} is the gate oxide capacitance per unit area. The transition from the exponential subthreshold region to the triode region is not as sharp as the equations suggest. When V GS > V th and V DS ≥ (V GS  – V th ): The switch

966-787: Is turned on, and a channel has been created which allows current between the drain and the source. The MOSFET operates like a resistor, controlled by the gate voltage relative to both the source and drain voltages. The current from drain to source is modeled as: I D = μ n C ox W L ( ( V GS − V t h ) V DS − V DS 2 2 ) {\displaystyle I_{\text{D}}=\mu _{n}C_{\text{ox}}{\frac {W}{L}}\left(\left(V_{\text{GS}}-V_{\rm {th}}\right)V_{\text{DS}}-{\frac {{V_{\text{DS}}}^{2}}{2}}\right)} where μ n {\displaystyle \mu _{n}}

1035-427: Is turned on, and a channel has been created, which allows current between the drain and source. Since the drain voltage is higher than the source voltage, the electrons spread out, and conduction is not through a narrow channel but through a broader, two- or three-dimensional current distribution extending away from the interface and deeper in the substrate. The onset of this region is also known as pinch-off to indicate

1104-447: The 45 nanometer node. When a voltage is applied between the gate and the source, the electric field generated penetrates through the oxide and creates an inversion layer or channel at the semiconductor-insulator interface. The inversion layer provides a channel through which current can pass between source and drain terminals. Varying the voltage between the gate and body modulates the conductivity of this layer and thereby controls

1173-458: The 6501's advantage of being able to be used in place of the Motorola 6800 in existing hardware, it was so inexpensive that it quickly became more popular than the 6800, making that a moot point. The 6502 was so cheap that many people believed it was a scam when MOS first showed it at a 1975 trade show. They were not aware of MOS's masking techniques and when they calculated the price per chip at

1242-447: The 6502 chip. At Commodore, Peddle convinced the owner, Jack Tramiel , that calculators were a dead end, and that home computers would soon be huge. However, the original design group appeared to be even less interested in working for Jack Tramiel than it had for Motorola, and the team quickly started breaking up. One result was that the newly completed 6522 (VIA) chip was left undocumented for years. Bill Mensch left MOS even before

1311-586: The 6502 was, the company itself was having problems. At about the same time the 6502 was being released, MOS's entire calculator IC market collapsed, and its prior existing products stopped shipping. Soon they were in serious financial trouble. Another company, Commodore Business Machines (CBM), had invested heavily in the calculator market and was also nearly wiped out by TI 's entry into the market. A fresh injection of capital saved CBM, and allowed it to invest in company suppliers in order to help ensure their IC supply would not be upset in this fashion again. Among

1380-459: The 6502—were achieving a success rate of 70 percent or better. This meant that not only were its designs faster, but they also cost much less as well. When the 6501 was announced, Motorola launched a lawsuit almost immediately. Although the 6501 instruction set was not compatible with the 6800, it could nevertheless be plugged into existing motherboard designs because it had the same functional pin arrangement and IC package footprint. That

1449-468: The 650x line from MOS, including Rockwell International , GTE , Synertek , and Western Design Center (WDC) . A number of different versions of the basic CPU, known as the 6503 through 6507, were offered in 28-pin packages for lower cost. The various models removed signal or address pins. Far and away the most popular of these was the 6507 , which was used in the Atari 2600 and Atari disk drives. The 6504

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1518-544: The Commodore Semiconductor Group superfund site. Most of the MOS chips are named according to following rules, which shows used technology (logic gate design): 40°07′27.9″N 75°25′07.2″W  /  40.124417°N 75.418667°W  / 40.124417; -75.418667 Metal Oxide Semiconductor The main advantage of a MOSFET is that it requires almost no input current to control

1587-529: The Commodore takeover, and moved home to Arizona. After a short stint consulting for a local company called ICE, he set up the Western Design Center (WDC) in 1978. As a licensee of the 6502 line, their first products were bug-fixed, power-efficient CMOS versions of the 6502 (the 65C02 , both as a separate chip and embedded inside a microcontroller called the 65C150). But then they expanded

1656-432: The Fermi level and when the voltage reaches the threshold voltage, the intrinsic level does cross the Fermi level, and that is what is known as inversion. At that point, the surface of the semiconductor is inverted from p-type into n-type. If the Fermi level lies above the intrinsic level, the semiconductor is of n-type, therefore at inversion, when the intrinsic level reaches and crosses the Fermi level (which lies closer to

1725-405: The ability to "fix" its masks after they had been produced. This meant that as flaws in the design were discovered, the masks could be removed from the aligners, fixed, and put back in. This allowed them to rapidly drive out flaws in the original masks. The company's production lines typically reversed the numbers others were achieving; even the early runs of a new CPU design—what would become

1794-463: The addition of n-type source and drain regions. The MOS capacitor structure is the heart of the MOSFET. Consider a MOS capacitor where the silicon base is of p-type. If a positive voltage is applied at the gate, holes which are at the surface of the p-type substrate will be repelled by the electric field generated by the voltage applied. At first, the holes will simply be repelled and what will remain on

1863-460: The aftermath; those that survived did so by finding other chips to produce. MOS became a supplier to Atari , producing a custom single-chip Pong system. Things changed dramatically in 1975. Several of the designers of the Motorola 6800 left Motorola shortly after its release, after management told them to stop working on a low-cost version of the design. At the time there was no such thing as

1932-423: The aligners by the truckload. This meant that if a flaw was found in the design, it would cost a significant amount of money to fix it, as all the older masks would have to be thrown out. In contrast, with Micralign there was only one mask per aligner, so there was no inherent cost in replacing the mask if need be, although the cost, and especially time, of producing these master masks was considerable. MOS developed

2001-448: The body) are highly doped as signified by a "+" sign after the type of doping. If the MOSFET is an n-channel or nMOS FET, then the source and drain are n+ regions and the body is a p region. If the MOSFET is a p-channel or pMOS FET, then the source and drain are p+ regions and the body is a n region. The source is so named because it is the source of the charge carriers (electrons for n-channel, holes for p-channel) that flow through

2070-406: The channel in whole or in part, they are referred to as raised source/drain regions. The operation of a MOSFET can be separated into three different modes, depending on the voltages at the terminals. In the following discussion, a simplified algebraic model is used. Modern MOSFET characteristics are more complex than the algebraic model presented here. For an enhancement-mode, n-channel MOSFET ,

2139-408: The channel; similarly, the drain is where the charge carriers leave the channel. The occupancy of the energy bands in a semiconductor is set by the position of the Fermi level relative to the semiconductor energy-band edges. With sufficient gate voltage, the valence band edge is driven far from the Fermi level, and holes from the body are driven away from the gate. At larger gate bias still, near

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2208-461: The company, operating under the name GMT Microelectronics ( G reat M ixed-signal T echnologies ), reopened MOS Technology's original, circa-1970 one-micrometre process fab ( semiconductor fabrication plant ) in Audubon , Montgomery County , Pennsylvania that Commodore had closed in 1993. The plant had been on the EPA's National Priorities List of hazardous waste sites since October 4, 1989. This

2277-414: The conduction band (valence band) then the semiconductor type will be of n-type (p-type). When the gate voltage is increased in a positive sense (for the given example), this will shift the intrinsic energy level band so that it will curve downwards towards the valence band. If the Fermi level lies closer to the valence band (for p-type), there will be a point when the Intrinsic level will start to cross

2346-422: The current flow between drain and source. This is known as enhancement mode. The traditional metal–oxide–semiconductor (MOS) structure is obtained by growing a layer of silicon dioxide ( SiO 2 ) on top of a silicon substrate, commonly by thermal oxidation and depositing a layer of metal or polycrystalline silicon (the latter is commonly used). As silicon dioxide is a dielectric material, its structure

2415-432: The current industry yield rates, it did not add up. But any hesitation to buy it evaporated when both Motorola and Intel dropped the prices on their own designs from $ 179 to $ 69 at the same show in order to compete. Their moves legitimized the 6502, and by the show's end, the wooden barrel full of samples was empty. The 6502 would quickly go on to be one of the most popular chips of its day. A number of companies licensed

2484-731: The depletion layer and C ox {\displaystyle C_{\text{ox}}} = capacitance of the oxide layer. This equation is generally used, but is only an adequate approximation for the source tied to the bulk. For the source not tied to the bulk, the subthreshold equation for drain current in saturation is I D ≈ I D0 e V G − V th n V T e − V S V T . {\displaystyle I_{\text{D}}\approx I_{\text{D0}}e^{\frac {V_{\text{G}}-V_{\text{th}}}{nV_{\text{T}}}}e^{-{\frac {V_{\text{S}}}{V_{\text{T}}}}}.} In

2553-418: The device may be referred to as a metal-insulator-semiconductor FET (MISFET). Compared to the MOS capacitor, the MOSFET includes two additional terminals ( source and drain ), each connected to individual highly doped regions that are separated by the body region. These regions can be either p or n type, but they must both be of the same type, and of opposite type to the body region. The source and drain (unlike

2622-468: The effect of thermal energy on the Fermi–Dirac distribution of electron energies which allow some of the more energetic electrons at the source to enter the channel and flow to the drain. This results in a subthreshold current that is an exponential function of gate-source voltage. While the current between drain and source should ideally be zero when the transistor is being used as a turned-off switch, there

2691-424: The electron is now fixed onto the atom and immobile. As the voltage at the gate increases, there will be a point at which the surface above the depletion region will be converted from p-type into n-type, as electrons from the bulk area will start to get attracted by the larger electric field. This is known as inversion . The threshold voltage at which this conversion happens is one of the most important parameters in

2760-565: The firm basically became Commodore's production arm, they continued using the name MOS for some time so that manuals would not have to be reprinted. After a while MOS became the Commodore Semiconductor Group (CSG) . Despite being renamed to CSG, all chips produced were still stamped with the old "MOS" logo until week 22/23 of 1989. MOS had previously designed a simple computer kit called the KIM-1 , primarily to "show off"

2829-477: The first planar transistors, in which drain and source were adjacent at the same surface. They showed that silicon dioxide insulated, protected silicon wafers and prevented dopants from diffusing into the wafer. At Bell Labs, the importance of Frosch and Derick technique and transistors was immediately realized. Results of their work circulated around Bell Labs in the form of BTL memos before being published in 1957. At Shockley Semiconductor , Shockley had circulated

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2898-485: The form of CMOS logic . The basic principle of the field-effect transistor was first patented by Julius Edgar Lilienfeld in 1925. In 1934, inventor Oskar Heil independently patented a similar device in Europe. In the 1940s, Bell Labs scientists William Shockley , John Bardeen and Walter Houser Brattain attempted to build a field-effect device, which led to their discovery of the transistor effect. However,

2967-413: The gate leads to a higher electron density in the inversion layer and therefore increases the current flow between the source and drain. For gate voltages below the threshold value, the channel is lightly populated, and only a very small subthreshold leakage current can flow between the source and the drain. When a negative gate-source voltage (positive source-gate) is applied, it creates a p-channel at

3036-408: The gate voltage at which the volume density of electrons in the inversion layer is the same as the volume density of holes in the body is called the threshold voltage . When the voltage between transistor gate and source ( V G ) exceeds the threshold voltage ( V th ), the difference is known as overdrive voltage . This structure with p-type body is the basis of the n-type MOSFET, which requires

3105-417: The increase in power consumption due to gate current leakage, a high-κ dielectric is used instead of silicon dioxide for the gate insulator, while polysilicon is replaced by metal gates (e.g. Intel , 2009). The gate is separated from the channel by a thin insulating layer, traditionally of silicon dioxide and later of silicon oxynitride . Some companies use a high-κ dielectric and metal gate combination in

3174-818: The lack of channel region near the drain. Although the channel does not extend the full length of the device, the electric field between the drain and the channel is very high, and conduction continues. The drain current is now weakly dependent upon drain voltage and controlled primarily by the gate-source voltage, and modeled approximately as: I D = μ n C ox 2 W L [ V GS − V th ] 2 [ 1 + λ V DS ] . {\displaystyle I_{\text{D}}={\frac {\mu _{n}C_{\text{ox}}}{2}}{\frac {W}{L}}\left[V_{\text{GS}}-V_{\text{th}}\right]^{2}\left[1+\lambda V_{\text{DS}}\right].} The additional factor involving λ,

3243-458: The line greatly with the introduction of the 65816 , a fairly straightforward 16-bit upgrade of the original 65C02 that could also run in 8-bit mode for compatibility. Since then WDC moved much of the original MOS catalog to CMOS, and the 6502 continued to be a popular CPU for the embedded systems market, like medical equipment and car dashboard controllers. After Commodore's bankruptcy in 1994, Commodore Semiconductor Group, MOS's successor,

3312-440: The load current, when compared to bipolar junction transistors (BJTs). In an enhancement mode MOSFET, voltage applied to the gate terminal increases the conductivity of the device. In depletion mode transistors, voltage applied at the gate reduces the conductivity. The "metal" in the name MOSFET is sometimes a misnomer , because the gate material can be a layer of polysilicon (polycrystalline silicon). Similarly, "oxide" in

3381-470: The name can also be a misnomer, as different dielectric materials are used with the aim of obtaining strong channels with smaller applied voltages. The MOSFET is by far the most common transistor in digital circuits, as billions may be included in a memory chip or microprocessor. Since MOSFETs can be made with either p-type or n-type semiconductors, complementary pairs of MOS transistors can be used to make switching circuits with very low power consumption, in

3450-495: The preprint of their article in December 1956 to all his senior staff, including Jean Hoerni , who would later invent the planar process in 1959 while at Fairchild Semiconductor . After this, J.R. Ligenza and W.G. Spitzer studied the mechanism of thermally grown oxides, fabricated a high quality Si/ SiO 2 stack and published their results in 1960. Following this research, Mohamed Atalla and Dawon Kahng proposed

3519-399: The semiconductor surface the conduction band edge is brought close to the Fermi level, populating the surface with electrons in an inversion layer or n-channel at the interface between the p region and the oxide. This conducting channel extends between the source and the drain, and current is conducted through it when a voltage is applied between the two electrodes. Increasing the voltage on

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3588-577: The several companies were LED display manufacturers, power controllers, and suppliers of the driver chips, including MOS. In late 1976, CBM, publicly traded on the NYSE with a market capitalization around US$ 60 million , purchased MOS (whose market cap was around US$ 12 million ) in an all-stock deal. Holders of MOS received a 9.4 percent equity stake in CBM on the condition that Chuck Peddle would join Commodore as chief engineer. The deal went through, and while

3657-606: The site. Announced in March 1999, GMT would have provided foundry services based on TelCom's Bipolar and SiCr (silicon chromium) Thin Film Resistor processes and would have been a licensed alternate source for TelCom's Bipolar based products, with production running at 10,000 5-inch semiconductor wafers per month, producing CMOS , BiCMOS, NMOS, bipolar and SOI ( silicon on insulator ) devices. In 2000, GMT Microelectronics discontinued operations and abandoned all of its assets at

3726-601: The structure failed to show the anticipated effects, due to the problem of surface states : traps on the semiconductor surface that hold electrons immobile. With no surface passivation , they were only able to build the BJT and thyristor transistors. In 1955, Carl Frosch and Lincoln Derick accidentally grew a layer of silicon dioxide over the silicon wafer, for which they observed surface passivation effects. By 1957 Frosch and Derick, using masking and predeposition, were able to manufacture silicon dioxide field effect transistors;

3795-418: The surface of the n region, analogous to the n-channel case, but with opposite polarities of charges and voltages. When a voltage less negative than the threshold value (a negative voltage for the p-channel) is applied between gate and source, the channel disappears and only a very small subthreshold current can flow between the source and the drain. The device may comprise a silicon on insulator device in which

3864-410: The surface will be immobile (negative) atoms of the acceptor type, which creates a depletion region on the surface. A hole is created by an acceptor atom, e.g., boron, which has one less electron than a silicon atom. Holes are not actually repelled, being non-entities; electrons are attracted by the positive field, and fill these holes. This creates a depletion region where no charge carriers exist because

3933-417: The thermal voltage V T = k T / q {\displaystyle V_{\text{T}}=kT/q} and the slope factor n is given by: n = 1 + C dep C ox , {\displaystyle n=1+{\frac {C_{\text{dep}}}{C_{\text{ox}}}},} with C dep {\displaystyle C_{\text{dep}}} = capacitance of

4002-443: The three operational modes are: When V GS < V th : where V GS {\displaystyle V_{\text{GS}}} is gate-to-source bias and V th {\displaystyle V_{\text{th}}} is the threshold voltage of the device. According to the basic threshold model, the transistor is turned off, and there is no conduction between drain and source. A more accurate model considers

4071-421: The valence band), the semiconductor type changes at the surface as dictated by the relative positions of the Fermi and Intrinsic energy levels. A MOSFET is based on the modulation of charge concentration by a MOS capacitance between a body electrode and a gate electrode located above the body and insulated from all other device regions by a gate dielectric layer. If dielectrics other than an oxide are employed,

4140-456: Was a similar inversion in pricing. The 6800 sold in small lots for $ 295 ; with no other changes than using a Micralign , the same design could sell for $ 42 . The change to the Micralign revealed a further advantage. Previously the masks were mass-produced by photography companies like Kodak , who would make tens of thousands of copies of a master mask, or " reticle ", and ship the masks to

4209-748: Was about 100 times slower than contemporary bipolar transistors and was initially seen as inferior. Nevertheless, Kahng pointed out several advantages of the device, notably ease of fabrication and its application in integrated circuits . Usually the semiconductor of choice is silicon . Some chip manufacturers, most notably IBM and Intel , use an alloy of silicon and germanium ( SiGe ) in MOSFET channels. Many semiconductors with better electrical properties than silicon, such as gallium arsenide , do not form good semiconductor-to-insulator interfaces, and thus are not suitable for MOSFETs. Research continues on creating insulators with acceptable electrical characteristics on other semiconductor materials. To overcome

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4278-417: Was bought by its former management for about $ 4.3 million , plus an additional $ 1 million to cover miscellaneous expenses including a United States Environmental Protection Agency (EPA) license. Dennis Peasenell became CEO. In December 1994, the EPA entered into a Prospective Purchase Agreement (limiting the company's liability in exchange for sharing the costs of cleanup) with GMT Microelectronics. In 1994,

4347-473: Was complete. In 1974 Perkin-Elmer publicly introduced the Micralign system, the first projection scanner. Instead of placing the mask on the surface of the chip, it held it far from the surface and used highly accurate optics to project the image. Masks now lasted for thousands of copies instead of tens, and the flaw rate of the chips inverted so that perhaps 70% of the chips produced would work. The result

4416-409: Was due to a 1978 leak of trichloroethylene (TCE) from an underground 250-gallon concrete storage tank used by Commodore Business Machines in the semiconductor cleaning process. Leaks from the tank had caused the local groundwater to become contaminated with TCE and other volatile organic compounds (VOCs) in 1978. By 1999 GMT Microelectronics had $ 21 million in revenues and 183 employees working on

4485-475: Was enough to allow Motorola to sue. Allen-Bradley sold back its shares to the founders, sales of the 6501 basically stopped, and the lawsuit would drag on for many years before MOS was eventually forced to pay US$ 200,000 in fines. In the meantime MOS had started selling the 6502 , a chip capable of operating at 1  MHz in September 1975 for a mere US$ 25 . It was nearly identical to the 6501, with only

4554-549: Was looking to provide a second source for electronic calculators and their chips designed by Texas Instruments (TI). In 1970 Allen-Bradley acquired a majority interest in MOS Technology. In the early 1970s, TI decided to release their own line of calculators, instead of selling just the chips inside them, and introduced them at a price that was lower than the price of the chipset alone. Many early chip companies were reliant on sales of calculator chips and were wiped out in

4623-413: Was placed directly on the surface of the chip, which had the significant disadvantage that it sometimes pulled away materials from the chip, which were then copied to subsequent chips. This caused the mask to become useless after about a dozen copies, and resulted in the vast majority of chips having fatal flaws; for a complex chip like the 6800, only about 10% of the chips would work once the masking process

4692-473: Was sometimes used in printers. MOS also released a series of similar CPUs using external clocks, which added a "1" to the name in the third digit, as the 6512 through 6515. These were useful in systems where the clock support was already being provided on the motherboard by some other source. The final addition was the "crossover" 6510 , used in the Commodore 64 , with additional I/O ports. However successful

4761-407: Was somewhat similar to the 6800, but by using several design simplifications, the 6501 would be up to four times faster. Previous CPU designs, like the 6800, were produced using a device known as a contact aligner . This was essentially a complex photocopier , which optically reproduced a CPU design, or "mask", on the surface of the silicon chip. The name "contact" referred to the fact that the mask

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