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49-621: The first models were the Quadra 700 and Quadra 900 , both introduced in October 1991. The Quadra 800 , 840AV and 605 were added through 1993. The Macintosh Centris line was merged with the Quadra in October 1993, adding the 610 , 650 and 660AV to the range. After the introduction of the Power Macintosh line in early 1994, Apple continued to produce and sell new Quadra models;

98-404: A 32-bit word from that memory required two bus cycles. A design that had 32 pins for both the address and data busses would access data twice as fast, making the machine that much faster even with no other changes. Moving to 32 bit addressing would also make the implementation of virtual memory easier, and allow for more than 16 MB of random access memory . But doing so would also demand

147-409: A DSP was not installed in later AV Macs, which were based on the more powerful PowerPC 601 - a CPU powerful enough to handle the coprocessor's duties on its own. Apple hired marketing firm Lexicon Branding to come up with the name. Lexicon chose the name Quadra hoping to appeal to engineers by evoking technical terms like quadrant and quadriceps. The Quadra name was also used for the successors to

196-576: A base model by the time its replacement, the Macintosh Quadra 800 , went on sale in early 1993. The Centris 650 , also introduced around the same time, offered similar performance to the Quadra 700 but in a desktop-style case with more expansion options while its entry-level configuration had a price point closer to $ 3,000. Form factor : The Quadra 700 case is largely the same as the popular Macintosh IIcx and Macintosh IIci models; this made it possible for users of those models to upgrade to

245-628: A faster oscillator (up to 74 MHz) results in a performance increase. Memory : The Quadra 700 could be upgraded to 68 megabytes of RAM, which with its 25 MHz processor made it a very useful computer for scientific or design work. Expansion : Two NuBus slots and a Processor Direct Slot ; processor upgrades from Apple and other manufacturers were sold for the 700 when the PowerPC 601 accelerator cards came along in 1994. Storage : 80 and 160 MB hard disks were available at launch. A faster 230 MB unit became available in mid-1992 when

294-483: A much higher total pin count. By the early 1980s, similar limitations on all modern CPU designs led to the introduction of the pin grid array that replaced the DIP. For the new project, Motorola selected a 169-pin layout, giving them plenty of room to work with. The design ultimately used only 114 of them. A great debate broke out about how to refer to the underlying design of the new chip in marketing materials. Technically,

343-402: A multiprocessing system (which were removed in the 68060), some support for high-level languages which did not get used much (and was removed from future 680x0 processors), bigger multiply (32×32→64 bits) and divide (64÷32→32 bits quotient and 32 bits remainder) instructions, and bit field manipulations. The new addressing modes add scaled indexing and another level of indirection to many of

392-440: A multiprocessor system, coprocessors could not be shared between CPUs. To avoid problems with returns from coprocessor, bus error, and address error exceptions, it was generally necessary in a multiprocessor system for all CPUs to be the same model, and for all FPUs to be the same model as well. The new instructions include some minor improvements and extensions to the supervisor state, several instructions for software management of

441-486: A new watch band to commemorate the event. Meanwhile, Walker instituted a new policy at MOS-8 to improve the plant itself. He normally called meetings at 6:30 AM. If things were not going well, he would move that up to 5:30, and even 4:30. This provided a strong incentive to get the plant running. The production problems were soon ironed out, and volume deliveries began late that year. By this point, their workstation customers had already developed complete systems ready to use

490-686: A proper three-stage pipeline. Though the 68010 had a "loop mode", which sped loops through what was effectively a tiny instruction cache, it held only two short instructions and was thus little used. The 68020 replaced this with a proper instruction cache of 256 bytes, the first 68k series processor to feature true on-chip cache memory. The previous 68000 and 68010 processors could only access word (16-bit) and long word (32-bit) data in memory if it were word-aligned (located at an even address). The 68020 has no alignment restrictions on data access. Naturally, unaligned accesses are slower than aligned accesses because they required an extra memory access. The 68020 has

539-462: A small 256-byte direct-mapped instruction cache, arranged as 64 four-byte entries. Although small, it still made a significant difference in the performance of many applications. The resulting decrease in bus traffic was particularly important in systems relying heavily on DMA . The 68020 has a coprocessor interface supporting up to eight coprocessors. The main CPU recognizes "F-line" instructions (with

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588-474: Is a personal computer designed, manufactured and sold by Apple Computer from October 1991 to March 1993. It was introduced alongside the Quadra 900 as the first computers in the Quadra series, using Motorola 68040 processor in order to compete with IBM-compatible PCs powered by the Intel i486DX . The Quadra 700 is also the first computer from Apple to be housed in a mini-tower form factor, which in 1991

637-639: Is a lower cost version of the Motorola 68020. The main difference is that the 68EC020 only has a 24-bit address bus, rather than the 32-bit address bus of the full 68020, and thus is only able to address 16 MB of memory. The Amiga 1200 computer and the Amiga CD32 game console use the cost-reduced 68EC020; the Namco System 22 , Taito F3 and Konami GX arcade boards also used this processor. The Atari Jaguar II prototype featured this to replace

686-516: Is asynchronous, so it is possible to run the coprocessors at a different clock rate than the CPU. Multiprocessing support is implemented externally by the use of an RMC pin to indicate an indivisible read-modify-write cycle in progress. All other processors have to hold off memory accesses until the cycle is complete. Software support for multiprocessing includes the TAS , CAS and CAS2 instructions. In

735-607: The 950 continued to be sold until October 1995. The product manager for the Quadra family was Frank Casanova who was also the Product Manager for the Macintosh IIfx . The first computers bearing the Macintosh Quadra name were the Quadra 700 and Quadra 900 , both introduced in 1991 with a central processing unit (CPU) speed of 25 MHz . The 700 was a compact model using the same case dimensions as

784-677: The Alpha Microsystems AM-2000. The 68020 was an alternative upgrade to the Sinclair QL 's 68008 in the Super Gold Card interface by Miracle Systems . The Amiga 2500 and A2500UX optionally shipped with the A2620 Accelerator using a 68020, 68881 FPU and 68851 MMU. The 2500UX shipped with Amiga Unix , requiring an '020 or '030 processor. A number of digital oscilloscopes from the mid-80s to

833-500: The Centris models that briefly existed during 1993: The 610 , the 650 and the 660AV . Centris was a "mid-range" line of systems between the Quadra on the high end and the LC on the low end, but it was later decided that there were too many product lines and the name was dropped. Some machines of this era including the Quadra 605 were also sold as Performas . The last use of the name

882-500: The Macintosh IIci , with a Processor Direct Slot (PDS) expansion slot, while the latter was a newly designed tower case with five NuBus expansion slots and one PDS slot. The 900 was replaced in 1992 with the Quadra 950 , with a CPU speed of 33 MHz. The line was joined by a number of "800-series" machines in a new minitower case design, starting with the Quadra 800 , and the "600-series" pizza box desktop cases with

931-567: The Macintosh IIx replaced it, using the 030. Although it ran at the same 16 MHz clock speed, the IIx offered 3.9 MIPS compared to the II's 2.6. The 68020 has 32-bit internal and external data and address buses, compared to the early 680x0 models with 16-bit data and 24-bit address buses. The 68020's ALU is also natively 32-bit, so can perform 32-bit operations in one clock cycle, whereas

980-512: The Quadra 610 . In 1993, the Quadra 840AV and 660AV were introduced at 40 MHz and 25 MHz respectively. They included an AT&T 3210 Digital signal processor and S-Video and composite video input/output ports, as well as CD -quality microphone and audio output ports. The AV models also introduced PlainTalk , consisting of the text-to-speech software MacinTalk Pro and speech control (although not dictation). However, all of these features were poorly supported in software and

1029-468: The Quadra 950 was introduced. Video : Like the IIci, the 700 has integrated graphics built into the system board but, unlike the earlier model, it uses dedicated VRAM for its video memory. The onboard video came with 512 kilobytes of VRAM soldered to the motherboard, and supported resolutions up to 1152x870. The video memory was expandable to 2 megabytes via six 256-kilobyte 100ns VRAM SIMMs in each of

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1078-526: The 020 and 030, the latter of which could be used as a drop-in replacement in many roles. For this reason, designs using the 030 appeared much more quickly after its release than the 020. The first Macintosh with the 020 was the Macintosh II released in March 1987, two years after the 020 had become widely available, with low-volume initial shipments starting two months later. Only eighteen months later,

1127-481: The 020 and the new floating point unit, the Motorola 68881 . Systems were in the market only five or six months after the 020 had been announced. Design of the 020's follow-on began almost immediately. As part of their ongoing work with Hitachi, Motorola's fabrication system was finally catching up with the competition, as was their internal design workflow. This gave them considerably more room to work with, allowing

1176-460: The 020 was moving from the long-established NMOS logic design to a CMOS layout, which requires two transistors per gate. Common knowledge of the era suggested that CMOS cost four times as much as NMOS, and there was a significant amount of the market that believed "CMOS equals bad." The design was completed in the summer of 1983 and announced in June 1984. This "super chip" was significant news at

1225-530: The 68000 took a minimum of two clock cycles due to its 16-bit ALU. Newer packaging methods allowed the '020 to feature more external pins without the large size that the earlier dual in-line package method required. The 68EC020 lowered cost through a 24-bit address bus. The 68020 was produced at speeds ranging from 12 MHz to 33 MHz. The 68020 has a 32-bit arithmetic logic unit (ALU), 32-bit external data and address buses. It adds extra instructions and additional addressing modes. The 68020 (and 68030) has

1274-458: The 68020 is usually referred to as the "020", pronounced "oh-two-oh" or "oh-twenty". The 020 was in the market for a relatively short time. The Motorola 68030 was announced in September 1986 and began deliveries in the summer of 1987. Priced about the same as the 020 of the time, the 030 was significantly faster and quickly replaced in 020 in almost every use. At the time the Motorola 68000

1323-543: The 68020, together with a 68882 FPU. It is also the processor used on TGV trains to decode signalling information sent to the trains through the rails. It is used in the flight control and radar systems of the Eurofighter Typhoon combat aircraft. The Nortel Networks DMS-100 telephone central office switch also used the 68020 as the first microprocessor of the SuperNode computing core. The 68EC020

1372-553: The Centris 610, the Quadra 800 and the Quadra 950, respectively. The transition to the Motorola 68040 was not as smooth as the previous transitions to the Motorola 68020 or Motorola 68030 . Due to the Motorola 68040's split instruction and data caches, the Quadra had compatibility problems with self-modifying code (including relocating code, which was common under the Macintosh memory model ). Apple partially fixed this by having

1421-562: The VRAM SIMM expansion slots on the motherboard. Expanding the video memory to 2 megabytes allowed for 24-bit (Millions) color at resolutions up to 832x624. Sound : 8-bit stereo, 22 kHz. Ports : I/O was available with dual serial ports, two ADB ports, an AAUI Ethernet port, mono audio in, stereo audio out, and a DB-25 SCSI connector. The Quadra 700, along with the 900, are the first Macintosh models with built-in support for Ethernet networking. Operating system : System 7.0.1

1470-541: The addition of larger processor caches , a built-in memory management unit (MMU) and other features. The Motorola 68030 was announced in September 1986, with deliveries to begin the next summer. Due to the changes in the production lines, the new 030 would have a lower launch price than the 020. There were significant differences between the 68000 and 020, especially the 32-bit memory interface. This required computer designs using it to be considerably different from earlier models. In contrast, there were few changes between

1519-417: The basic Mac OS memory copy call flush the caches. This solved the vast majority of stability problems, but negated much of the Motorola 68040's performance improvements. Apple also introduced a variant of the memory copy call that did not flush the cache. The new trap was defined in such a way that calling it on an older version of Mac OS would simply call the previous memory copy routine. The net effect of this

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1568-420: The fastest CPU available when it was introduced, it was not nearly as powerful as it could be if it had been designed with more modern techniques. During the period of the 68000 design, the company was working with Hitachi on their process technology and as part of this they opened a new fab, MOS-8, using 5-inch wafers and the latest HMOS process licensed from Intel . This line was capable of building all of

1617-431: The four most significant opcode bits all one), and uses special bus cycles to interact with a coprocessor to execute these instructions. Two types of coprocessors were defined: floating point units ( MC68881 or MC68882 FPUs ) and the paged memory management unit ( MC68851 PMMU). Only one PMMU can be used with a CPU. In principle, multiple FPUs could be used with a CPU, but it was not commonly done. The coprocessor interface

1666-573: The late-90s used the 68020, including the LeCroy 9300 Series (higher end models including "C" suffix models used the more powerful 68EC030 ; the 9300 models with a 68020 processor can be upgraded to the 68EC030 with a change of the CPU board ) and the earlier LeCroy 9400 series (all models excluding the 9400/9400A which used the 68000 ), along with certain Tektronix TDS Series models. The HP 54520, 54522, 54540 and 54542 also use

1715-488: The more powerful Quadra 700. Users sometimes placed the older case vertically in a mini-tower orientation and the Quadra 700 recognized this by having the Apple logo and model name printed in the vertical orientation. The IIcx and IIci were designed to allow their rubber feet to be moved to the side for vertical orientation as well. CPU : Motorola 68040 @ 25 MHz. The clock oscillator runs at 50 MHz; replacing it with

1764-424: The new techniques, but the 68000 went ahead with the older design as they were sure it would work. Moving to new design techniques would wait until the design was in the market. The conversion to the new design techniques took place during the Motorola 68010 effort, a relatively minor upgrade to the original design that added basic virtual memory support for the emerging Unix workstation market. As this effort

1813-460: The pre-existing modes. With full 32-bit internal and external address buses, the address registers (A0 through A7) could utilize their full 32-bit width, and were capable of addressing the entire 4 GB address space. The larger effective widths of the address registers presented some problem for earlier software that was not considered " 32-bit clean ". Some programs used the high 8 bits (bits 24-31) of addresses to contain various flag bits, with

1862-411: The same MOS-8 factory as the 68000, although several new pieces of equipment were introduced to support it. By the time of the public release, the yield for the new chip was zero. That is, for every wafer sent through the multi-step process, zero working chips would be produced. Gary Johnson concluded the problem was the floor manager of MOS-8, Tom Felesi, and decided to replace him with Bill Walker, who

1911-667: The time, with the New York Times making it a lead story in their business section. The launch price was quoted at $ 487 each, about the same as the 68000 when it was launched in 1980, but the 68000 was now available for about $ 15. However, it was understood that it would be some time before computers using the new chip would be available, as existing designs would have to be heavily modified to take advantage of its performance. The announcement led to Motorola's customers clamouring for supply. At this point, serious supply problems became evident. The design had been laid out to be built in

1960-620: The understanding that the earlier 680x0 CPUs would safely ignore these high bits. Such software had to be rewritten to adjust to the larger physical address space available to the 68020 and later CPUs. The 68020 was used in the Apple Macintosh II and Macintosh LC personal computers , Sun-3 workstations, Amiga 1200 (68EC020 variant), the Hewlett-Packard 8711 Series Network Analyzers, HP 9000 /320, HP 9000/330, Apollo Computer 's DN3000 and DN4000 workstations, and

2009-424: Was 64, and even at that size, packaging of this size was highly problematic. By reducing the number of address pins to 24, and the data pins to only 16, there were enough free pins to implement all the other needed lines, like interrupts and power supplies. The 24-pin address bus meant that the memory could only be 16 MB in total, which was at this point becoming a limitation. The 16-bit data bus meant reading

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2058-483: Was a new piece of equipment from a new vendor, Genius, which produced silicide . The machine simply didn't work. Walker flew to California to meet with the CEO of Genius, who offered up nothing but excuses. Walker eventually slammed his hand down on the desk, breaking his watch band, and stated "No more excuses! I want this thing fixed now, today!" Genius took the demand seriously and fixed the machine. The CEO later sent Walker

2107-456: Was at that time running the older MOS-2 factory. Walker arrived at the plant on 5 July 1985 to find Johnson had not bothered to tell Felesi of the change, and arguments followed. Johnson eventually told Felesi this was indeed happening. Walker then toured the plant and found it had been turned into what was essentially a research and development lab, not a production line, with numerous bits of machinery in use nowhere else. One significant issue

2156-428: Was becoming a popular alternative to standard desktop-on-monitor cases that were common through the 1980s. The Quadra 700 was considerably more popular than the Quadra 900 (succeeded after six months by the very similar Quadra 950 ) that it was sold alongside, due to the 900/950 being expensive and bulky with its full tower case. The Quadra 700 originally had a list price of US$ 5,700, but had dropped to under $ 4,700 for

2205-407: Was designed, Motorola's design and fabrication services were outdated. Although even small companies like MOS Technology and Zilog had moved on to silicon gate depletion mode NMOS logic on ever-larger wafers , Motorola was still using metal gates and enhancement mode and their largest fab worked on 4-inch wafers long after most lines had moved to 5-inch. Although the 68000 met the goal of being

2254-557: Was for the Quadra 630 , which was a variation of the LC 630 using a "full" Motorola 68040 instead of the LC's 68LC040 , and introduced together with it in 1994. The 630 was the first Mac to use an IDE based drive bus for the internal hard disk drive, whereas all earlier models had used SCSI . The first three Apple Workgroup Server models, the WGS 60, the WGS 80 and the WGS 95 (mostly called "AWS 95" for "Apple Workgroup Server") were based on

2303-450: Was included as standard. This is the earliest Macintosh model to support Mac OS 8 . The Quadra 700 uses tantalum capacitors on the logic board, rather than electrolytic capacitors which can leak fluid. Motorola 68020 The Motorola 68020 is a 32-bit microprocessor from Motorola , released in 1984. A lower-cost version was also made available, known as the 68EC020 . In keeping with naming practices common to Motorola designs,

2352-509: Was ongoing, Motorola was canvassing their customers for their desires for future developments in the line. These all pointed to a fully 32-bit implementation. Those using the 68k in Unix systems also stated they would purchase a floating point unit for every one of the machines if one was available. The original 68000 had been designed as a hybrid 16/32-bit system largely because the maximum number of pins available on dual inline packages (DIPs)

2401-448: Was that many complex applications were initially slow or prone to crashing on the 68040, although developers quickly adapted to the new architecture by relying on Apple's memory copy routines rather than their own (or flushing the cache) and using the memory copy that did not flush the cache when appropriate (most of the time). According to Apple, all of these models are obsolete. Macintosh Quadra 700 The Macintosh Quadra 700

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