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52-561: Originally known as the "Moosehead" project, the O2 architecture features a proprietary high-bandwidth Unified Memory Architecture (UMA) to connect system components. A PCI bus is bridged onto the UMA with one slot available. It has a designer case and an internal modular construction. Two SCSI drives can be mounted on special caddies (one in the later R10000/R12000 models due to heat constraints) and an optional video capture / sound cassette mounted on

104-491: A real-time environment and fail if an operation is not completed in a specified amount of time. For example, computer-controlled anti-lock brakes must begin braking within a predictable and limited time period after the brake pedal is sensed or else failure of the brake will occur. Benchmarking takes all these factors into account by measuring the time a computer takes to run through a series of test programs. Although benchmarking shows strengths, it should not be how you choose

156-483: A bus to the graphics subsystem, the O2 passes a pointer to the texture in main memory which is then accessed by the graphics hardware. This makes using large textures easy, and even makes using streaming video as a texture possible. Since the CPU performs many of geometry calculations, using a faster CPU will increase the speed of a geometry-limited application. The O2's graphics is known to have slower rasterization speed than

208-415: A computer capable of running a virtual machine needs virtual memory hardware so that the memory of different virtual computers can be kept separated. Computer organization and features also affect power consumption and processor cost. Once an instruction set and microarchitecture have been designed, a practical machine must be developed. This design process is called the implementation . Implementation

260-427: A computer. Often the measured machines split on different measures. For example, one system might handle scientific applications quickly, while another might render video games more smoothly. Furthermore, designers may target and add special features to their products, through hardware or software, that permit a specific benchmark to execute quickly but do not offer similar advantages to general tasks. Power efficiency

312-469: A detailed analysis of the computer's organization. For example, in an SD card , the designers might need to arrange the card so that the most data can be processed in the fastest possible way. Computer organization also helps plan the selection of a processor for a particular project. Multimedia projects may need very rapid data access, while virtual machines may need fast interrupts. Sometimes certain tasks need additional components as well. For example,

364-407: A higher clock rate may not necessarily have greater performance. As a result, manufacturers have moved away from clock speed as a measure of performance. Other factors influence speed, such as the mix of functional units , bus speeds, available memory, and the type and order of instructions in the programs. There are two main types of speed: latency and throughput . Latency is the time between

416-408: A proposed instruction set. Modern emulators can measure size, cost, and speed to determine whether a particular ISA is meeting its goals. Computer organization helps optimize performance-based products. For example, software engineers need to know the processing power of processors . They may need to optimize software in order to gain the most performance for the lowest price. This can require quite

468-516: A riser card. The Indigo preceded the Indigo2, which is succeeded by the Octane . Indigo2 desktop workstations have two models: the teal Indigo2 and the purple IMPACT. Both have identical looking cases except color, and sub-model case badging. The CPU types, the amount of RAM, and graphics capabilities, depend on the model or sub-model variation. Power Indigo2 is a version of the teal Indigo2, with

520-552: A significant amount of computational power which enables the O2 to do video decoding and audio tasks that would require a much faster CPU if done without SIMD instructions. ICE only works with the IRIX operating system, as this is the only system that has drivers capable of taking advantage of this device. The Unified Memory Architecture means that the O2 uses main memory for graphics textures, making texturing polygons and other graphics elements trivial. Instead of transferring textures over

572-503: A single chip as possible. In the world of embedded computers , power efficiency has long been an important goal next to throughput and latency. Increases in clock frequency have grown more slowly over the past few years, compared to power reduction improvements. This has been driven by the end of Moore's Law and demand for longer battery life and reductions in size for mobile technology . This change in focus from higher clock rates to power consumption and miniaturization can be shown by

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624-585: A thermal specification maximum of either 384 MB or 512 MB RAM. The design of the memory control logic in R10000 machines support up to 1 GB RAM, but the thermal output of older generation of DRAM chips necessitate the 512 MB limit. With newer, higher-density and smaller scale modules, 768 MB is easily within heat output specifications. Later 128 MB modules allow the full 1 GB with eight out of twelve sockets occupied. All Indigo2 models can accommodate two 3.5" SCSI disk drives and one 5.25" SCSI CD-ROM drive inside bays on

676-415: Is another important measurement in modern computers. Higher power efficiency can often be traded for lower speed or higher cost. The typical measurement when referring to power consumption in computer architecture is MIPS/W (millions of instructions per second per watt). Modern circuits have less power required per transistor as the number of transistors per chip grows. This is because each transistor that

728-467: Is concerned with balancing the performance, efficiency, cost, and reliability of a computer system. The case of instruction set architecture can be used to illustrate the balance of these competing factors. More complex instruction sets enable programmers to write more space efficient programs, since a single instruction can encode some higher-level abstraction (such as the x86 Loop instruction ). However, longer and more complex instructions take longer for

780-439: Is named "Solid" due to its applications for solid (non-textured) modeling. When expanded by adding a TRAM (Texture RAM) module to the board, the amount of texture memory can be increased to 4 MB. Maximum IMPACT graphics require two of these modules due its two pixel units, although this does not upgrade them to 8 MB, with the two modules merely working in parallel to render twice as fast. Of all contemporaries, Maximum IMPACT graphics

832-612: Is provided by the IO Engine ASIC. The ASIC provides a 64-bit PCI bus, an ISA bus, two PS/2 ports for keyboard and mouse, and a 10/100 Base-T Ethernet port. The PCI bus has one 64-bit slot, but the ISA bus is present solely for attaching a Super I/O chip to provide serial and parallel ports. The O2 carries an UltraWide SCSI drive subsystem (Adaptec 7880). Older O2's generally have 4x speed Toshiba CD-ROMs, but any Toshiba SCSI CD-ROM can be used (as well as from other manufacturers,

884-471: Is put in a new chip requires its own power supply and requires new pathways to be built to power it. However, the number of transistors per chip is starting to increase at a slower rate. Therefore, power efficiency is starting to become as important, if not more important than fitting more and more transistors into a single chip. Recent processor designs have shown this emphasis as they put more focus on power efficiency rather than cramming as many transistors into

936-465: Is the amount of time that it takes for information from one node to travel to the source) and throughput. Sometimes other considerations, such as features, size, weight, reliability, and expandability are also factors. The most common scheme does an in-depth power analysis and figures out how to keep power consumption low while maintaining adequate performance. Modern computer performance is often described in instructions per cycle (IPC), which measures

988-478: Is the art of determining the needs of the user of a structure and then designing to meet those needs as effectively as possible within economic and technological constraints." Brooks went on to help develop the IBM System/360 line of computers, in which "architecture" became a noun defining "what the user needs to know". The System/360 line was succeeded by several compatible lines of computers, including

1040-450: Is the interface between the computer's software and hardware and also can be viewed as the programmer's view of the machine. Computers do not understand high-level programming languages such as Java , C++ , or most programming languages used. A processor only understands instructions encoded in some numerical fashion, usually as binary numbers . Software tools, such as compilers , translate those high level languages into instructions that

1092-630: Is the world's fastest desktop visualization solution. A Maximum IMPACT with 4 MB of texture memory and the correct graphics settings can play the first three of the Quake video game series with acceptable frame rates. All graphics options for Indigo2 use the standard 13W3 connector for connecting the monitor and another connector for 3D stereoscopic glasses. It is possible to have a dual-head Indigo2 by merely adding another Solid IMPACT card. Valid configurations include Solid/Solid, Solid/High, Solid/Maximum. Although there are four GIO-64 slots available and

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1144-466: Is usually not considered architectural design, but rather hardware design engineering . Implementation can be further broken down into several steps: For CPUs , the entire implementation process is organized differently and is often referred to as CPU design . The exact form of a computer system depends on the constraints and goals. Computer architectures usually trade off standards, power versus performance , cost, memory capacity, latency (latency

1196-578: The Indigo2 's Maximum IMPACT graphics boards, though the Maximum IMPACT graphics is limited to 4 MB of texture memory, which can result in thrashing, whereas the O2 is limited only by available memory. While CPU frequencies of 180 to 400 MHz seem low today, when the O2 was released in 1996, these speeds were on par with or above the current offerings for the x86 family of computers (cf. Intel's Pentium and AMD's K5 ). O2s were often used in

1248-609: The R8000 chipset and strong floating-point arithmetic performance. The later IMPACT Indigo2 workstation model has more computational and visualization power, especially due to the introduction of the R10000 series RISC CPU and IMPACT graphics. All Indigo2 models use one of four distinct MIPS CPU variants: the 100 to 250 MHz MIPS R4000 and R4400, and the Quantum Effect Devices R4600 (IP22 mainboard);

1300-563: The SGI Challenge M are Unix workstations which were designed and sold by SGI from 1992 to 1997. The Indigo2, codenamed "Fullhouse", is a desktop workstation . The Challenge M is a server which differs from the Indigo2 only by a slightly differently colored and badged case, and the absence of graphics and sound hardware. Both systems are based on the MIPS processors , with EISA bus and SGI proprietary GIO64 expansion bus via

1352-487: The processor to decode and can be more costly to implement effectively. The increased complexity from a large instruction set also creates more room for unreliability when instructions interact in unexpected ways. The implementation involves integrated circuit design , packaging, power , and cooling . Optimization of the design requires familiarity with topics from compilers and operating systems to logic design and packaging. An instruction set architecture (ISA)

1404-609: The 3Com 3C597-TX 100Mbit EISA, and the Phobos G160 GIO64. The second one offers better overall performance due to using the superior GIO64 bus, which also has the effect of reducing the CPU utilization due to DMA transfers. The graphics options available for the Indigo2 can be divided in two groups: the pre-IMPACT and the MGRAS IMPACT boards. Pre-IMPACT options consist of the following options: Indigo2 XL24, Indigo2 XZ, Elan , and Extreme . These options are based on

1456-506: The 75 MHz MIPS R8000 (IP26 mainboard); and the 175 to 195 MHz R10000 (IP28 mainboard), which are featured in the last produced Indigo2 model, the IMPACT10000. Each microprocessor family differs in clock frequency, and in primary and secondary cache capacity. All Indigo2 motherboards have 12 SIMM slots, for standard 36-bit parity 72-pin fast page mode SIMM memory modules seated in groups of four. Indigo2 can be expanded to

1508-623: The CRM chipset specifically developed by SGI for the O2. It was developed to be a low-cost implementation of the OpenGL 1.1 architecture with ARB image extensions in both software and hardware. The chipset consists of the microprocessor, and the ICE, MRE and Display ASICs. All display list and vertex processing, as well as the control of the MRE ASIC is performed by the microprocessor. The ICE ASIC performs

1560-559: The High IMPACT takes up two, it is not possible to have a High/High configuration. The IMPACT boards draw more power than the GIO-64 bus can deliver, so IMPACT-ready systems have additional power connectors on the expansion riser card, with a separate connection to the power supply. An IMPACT-ready Indigo2 must have an IMPACT-ready riser card, an IMPACT-ready power supply, and a sufficiently recent PROM revision. The Indigo2's successor,

1612-458: The Maximum IMPACT provides double the performance. The High IMPACT AA option has the geometry performance of a Maximum IMPACT, but is otherwise the same as the High IMPACT including the pixel fill performance. The IMPACT graphics is the first desktop graphics system from SGI to offer texture mapping acceleration, though only the High IMPACT and Maximum IMPACT had this capability, and comes with 1 MB of texture memory as standard. The Solid IMPACT card

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1664-425: The Maximum IMPACT. These newer boards have a different architecture than the earlier designs. Physically, they appear to be similar to the older graphics options; the low-end Solid IMPACT board takes up a single GIO-64 slot, the mid-range High IMPACT takes up two GIO-64 slots, and the high end Maximum IMPACT occupies three. The High IMPACT and Solid IMPACT boards provide the same performance for non-textured tasks, while

1716-501: The O2. There are eight DIMM slots on the motherboard and memory, and all O2s are expandable to 1 GB using proprietary 239-pin SDRAM DIMMs . The Memory & Rendering Engine (MRE) ASIC contains the memory controller . Memory is accessed via a 133 MHz 144-bit bus, of which 128 bits are for data and the remaining for ECC . This bus is interfaced by a set of buffers to the 66 MHz 256-bit memory system. I/O functionality

1768-536: The O2: The SGI O2 has an Imaging and Compression Engine (ICE) application-specific integrated circuit (ASIC) for processing streaming media and still images. ICE operates at 66 MHz and contains a R3000 -derived microprocessor serving as the scalar unit to which a 128-bit SIMD unit is attached using the MIPS coprocessor interface. ICE operates on eight 16-bit or sixteen 8-bit integers, but still provides

1820-533: The bezel replacement however is designed to fit Toshiba design and also IRIX cannot utilize CD-DA mode other than Toshiba). Later units have Toshiba DVD-ROMs. The R5000/RM7000 units have two available drive sleds for SCA UltraWide SCSI hard-disks. Because the R10000/R12000 CPU module has a much higher cooling-fan assembly, the R10000/R12000 units have room for only one drive-sled. The O2 used

1872-503: The code is to understand), size of the code (how much code is required to do a specific action), cost of the computer to interpret the instructions (more complexity means more hardware needed to decode and execute the instructions), and speed of the computer (with more complex decoding hardware comes longer decode time). Memory organization defines how instructions interact with the memory, and how memory interacts with itself. During design emulation , emulators can run programs written in

1924-488: The current IBM Z line. Later, computer users came to use the term in many less explicit ways. The earliest computer architectures were designed on paper and then directly built into the final hardware form. Later, computer architecture prototypes were physically built in the form of a transistor–transistor logic (TTL) computer—such as the prototypes of the 6800 and the PA-RISC —tested, and tweaked, before committing to

1976-448: The efficiency of the architecture at any clock frequency; a faster IPC rate means the computer is faster. Older computers had IPC counts as low as 0.1 while modern processors easily reach nearly 1. Superscalar processors may reach three to five IPC by executing several instructions per clock cycle. Counting machine-language instructions would be misleading because they can do varying amounts of work in different ISAs. The "instruction" in

2028-437: The far left side. The O2 came in two distinct CPU flavours: the low-end MIPS 180 to 350 MHz R5000 - or RM7000-based units and the higher-end 150 to 400 MHz R10000 - or R12000 -based units. The 200 MHz R5000 CPUs with 1 MB L2-cache are generally noticeably faster than the 180 MHz R5000s with 512 KB cache. There is a hobbyist project that has successfully retrofitted a 600 MHz RM7xxx MIPS processor into

2080-590: The final hardware form. As of the 1990s, new computer architectures are typically "built", tested, and tweaked—inside some other computer architecture in a computer architecture simulator ; or inside a FPGA as a soft microprocessor ; or both—before committing to the final hardware form. The discipline of computer architecture has three main subcategories: There are other technologies in computer architecture. The following technologies are used in bigger companies like Intel, and were estimated in 2002 to count for 1% of all of computer architecture: Computer architecture

2132-513: The following fields: Computer architecture In computer science and computer engineering , computer architecture is a description of the structure of a computer system made from component parts. It can sometimes be a high-level description that ignores details of the implementation. At a more detailed level, the description may include the instruction set architecture design, microarchitecture design, logic design , and implementation . The first documented computer architecture

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2184-776: The front of the machine, using specially designed Indigo2 drive sleds with proprietary connectors. All three drive bays are easily accessed when removing the Indigo2 front bezel. The internal SCSI bus speed of the Indigo2 is about 10 MB/s. The typical hard disks are narrow (SCSI-1) 5200rpm and 7200rpm drives. All of the Indigo2 drive sleds have a 50-pin female SCSI-1 connector and standard 4-pin power connector. Advanced U160 and U320 SCSI disk drives can also be used but then one needs appropriate adapters (80/68-pin to 50-pin SCSI). 10Mbit on-board LAN interface, 100Mbit LAN options were made by third parties, either via EISA or GIO64 expansion cards. The two most known and widely used Indigo2 network cards are

2236-474: The instructions. The names can be recognized by a software development tool called an assembler . An assembler is a computer program that translates a human-readable form of the ISA into a computer-readable form. Disassemblers are also widely available, usually in debuggers and software programs to isolate and correct malfunctions in binary computer programs. ISAs vary in quality and completeness. A good ISA compromises between programmer convenience (how easy

2288-432: The luxuriously embellished computer, he noted that his description of formats, instruction types, hardware parameters, and speed enhancements were at the level of "system architecture", a term that seemed more useful than "machine organization". Subsequently, Brooks, a Stretch designer, opened Chapter 2 of a book called Planning a Computer System: Project Stretch by stating, "Computer architecture, like other architecture,

2340-445: The packaging and unpacking of pixels as well as operations on pixel data. The MRE ASIC performs rasterization and texture mapping. Due to the unified memory architecture, the texture and framebuffer memory comes from main memory, resulting in a system that has a variable amount of each memory. The Display Engine generates analog video signals from framebuffer data fetched from the memory for display. Several operating systems support

2392-482: The processor can understand. Besides instructions, the ISA defines items in the computer that are available to a program—e.g., data types , registers , addressing modes , and memory . Instructions locate these available items with register indexes (or names) and memory addressing modes. The ISA of a computer is usually described in a small instruction manual, which describes how the instructions are encoded. Also, it may define short (vaguely) mnemonic names for

2444-576: The same Express Graphics architecture from the original SGI Indigo , but feature improved performance. The Indigo2 XZ was launched in August 1993 at $ 25,500 (equivalent to $ 53,800 in 2023) and the Indigo2 XL was launched in third quarter 1993 at $ 18,000 (equivalent to $ 38,000 in 2023). The MGRAS IMPACT (or just IMPACT) family include the Solid IMPACT, High IMPACT, High IMPACT AA, and

2496-633: The significant reductions in power consumption, as much as 50%, that were reported by Intel in their release of the Haswell microarchitecture ; where they dropped their power consumption benchmark from 30–40 watts down to 10–20 watts. Comparing this to the processing speed increase of 3 GHz to 4 GHz (2002 to 2006), it can be seen that the focus in research and development is shifting away from clock frequency and moving towards consuming less power and taking up less space. SGI Indigo%C2%B2 and Challenge M The SGI Indigo2 (stylized as "Indigo ") and

2548-546: The standard measurements is not a count of the ISA's machine-language instructions, but a unit of measurement, usually based on the speed of the VAX computer architecture. Many people used to measure a computer's speed by the clock rate (usually in MHz or GHz). This refers to the cycles per second of the main clock of the CPU . However, this metric is somewhat misleading, as a machine with

2600-507: The start of a process and its completion. Throughput is the amount of work done per unit time. Interrupt latency is the guaranteed maximum response time of the system to an electronic event (like when the disk drive finishes moving some data). Performance is affected by a very wide range of design choices — for example, pipelining a processor usually makes latency worse, but makes throughput better. Computers that control machinery usually need low interrupt latencies. These computers operate in

2652-589: The work of Lyle R. Johnson and Frederick P. Brooks, Jr. , members of the Machine Organization department in IBM's main research center in 1959. Johnson had the opportunity to write a proprietary research communication about the Stretch , an IBM-developed supercomputer for Los Alamos National Laboratory (at the time known as Los Alamos Scientific Laboratory). To describe the level of detail for discussing

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2704-449: Was in the correspondence between Charles Babbage and Ada Lovelace , describing the analytical engine . While building the computer Z1 in 1936, Konrad Zuse described in two patent applications for his future projects that machine instructions could be stored in the same storage used for data, i.e., the stored-program concept. Two other early and important examples are: The term "architecture" in computer literature can be traced to

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