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71-531: The 7xx family is also widely used in embedded devices like printers, routers, storage devices, spacecraft, and video game consoles. The 7xx family had its shortcomings, namely lack of SMP support and SIMD capabilities and a relatively weak FPU . Motorola's 74xx range of processors picked up where the 7xx left off. PowerPC 7xx processors have largely been manufactured in the range of 250nm to 100nm lithography. The PowerPC 740 and 750 (codename Arthur) were introduced in late 1997 as an evolutionary replacement for

142-435: A Phillips screwdriver . While some of the earlier models (e.g., 800 MHz and 933 MHz) have a specified 640 MB RAM limit, it is possible to have a total of 1.12 GB of RAM installed (128 MB built-in, plus a 1 GB SO-DIMM), or 1.25 or 1.5 GB in the later models with 256 or 512 MB of RAM soldered to the logic board. Although no longer officially supported by macOS versions beyond those given in

213-429: A multiprocessor computer hardware and software architecture where two or more identical processors are connected to a single, shared main memory , have full access to all input and output devices, and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes. Most multiprocessor systems today use an SMP architecture. In the case of multi-core processors ,

284-488: A 0.20 μm process with copper interconnects , which increased the frequency up to 500 MHz and decreased power consumption to 6 W and the die size to 40 mm. The 740 slightly outperformed the Pentium II while consuming far less power and with a smaller die. The off-die L2 cache of the 750 increased performance by approximately 30% in most situations. The design was so successful that it quickly surpassed

355-506: A 16 mm die. It draws up to 2.7 W at 600 MHz, 9.8 W at 1 GHz. The CPU in Wii is virtually identical to the 750CL but it runs at 729 MHz, a frequency not supported by stock 750CL. It measures only 4.2 x 4.5 mm (18.9 mm). This is smaller than half the size of the "Gekko" microprocessor (43 mm) incorporated in the GameCube at its first release. The CPU in Wii U

426-558: A 64-entry branch target instruction cache (BTIC). Dynamic branch prediction uses the recorded outcome of a branch stored in a 512-entry by 2-bit branch history table (BHT) to predict its outcome. The BTIC caches the first two instructions at a branch target. The 740/750 models had 6.35 million transistors and were initially manufactured by IBM and Motorola in an aluminium based fabrication process. The die measured 67 mm at 0.26 μm and it reached speeds of up to 366 MHz while consuming 7.3 W. In 1999, IBM fabricated versions in

497-432: A NUMA architecture, processors may access local memory quickly and remote memory more slowly. This can dramatically improve memory throughput as long as the data are localized to specific processes (and thus processors). On the downside, NUMA makes the cost of moving data from one processor to another, as in workload balancing, more expensive. The benefits of NUMA are limited to particular workloads, notably on servers where

568-402: A RAD750 on board. The processor has 10.4 million transistors, is manufactured by BAE Systems using either 250 or 150 nm process and has a die area of 130 mm. It operates at 110 to 200 MHz. The CPU itself can withstand 200,000 to 1,000,000 Rads and temperature ranges between −55 and 125 °C. The RAD750 packaging and logic functions has a price tag in excess of US$ 200,000 :

639-431: A die size of 35 mm and consumes less than 4 W at 800 MHz at typical loads. It was the last G3 type processor used by Apple (employed on the iBook G3). A low powered version of 750FX is available called 750FL. 750FX powers NASA's Orion Multi-Purpose Crew Vehicle . Orion is using Honeywell International Inc. flight computer originally built for Boeing's 787 jet airliner. 750GX (codenamed Gobi), revealed in 2004,

710-517: A die size of 43 mm through a 0.18 μm copper process. The 750CX was only used in one iMac and iBook revision. 750CXe (codename Anaconda), introduced in 2001, is a minor revision of 750CX to increase its clock speed to 700 MHz and memory bus from 100 MHz to 133 MHz. The 750CXe also features improved floating-point performance over the 750CX. Several iBook models and the last G3-based iMac have this processor. A cost reduced version of 750CXe, called 750CXr, has lower frequencies. Gekko

781-514: A few limits on the scalability of SMP due to cache coherence and shared objects. Uniprocessor and SMP systems require different programming methods to achieve maximum performance. Programs running on SMP systems may experience an increase in performance even when they have been written for uniprocessor systems. This is because hardware interrupts usually suspends program execution while the kernel that handles them can execute on an idle processor instead. The effect in most applications (e.g. games)

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852-470: A handle into the casing, lack of a display closing latch, lack of a hinged cover over the external ports and built-in wireless networking. Two years later, the second generation abandoned the original form factor in favor of a more conventional, rectangular design. In October 2003, the third generation was introduced, adding a PowerPC G4 chip, USB 2.0 and a slot-loading drive. iBooks were very popular in education , with Henrico County Public Schools being

923-580: A pool of homogeneous processors running independently of each other. Each processor, executing different programs and working on different sets of data, has the capability of sharing common resources (memory, I/O device, interrupt system and so on) that are connected using a system bus or a crossbar . SMP systems have centralized shared memory called main memory (MM) operating under a single operating system with two or more homogeneous processors. Usually each processor has an associated private high-speed memory known as cache memory (or cache) to speed up

994-458: A press conference in Cupertino, California , on May 1, 2001. The previous bold colors and bulky form-factor were abandoned, as were the handle, latch-less design and additional power connectors on the bottom surface. The resulting iBook was available in white only, hence the name "Snow" and incorporated transparent polycarbonate in its casing. It was 30% lighter, and occupied less than half of

1065-470: A process smaller than 90 nm , effectively phasing it out as a commodity chip competitive in such markets as networking equipment. However IBM did make the Espresso processor for Nintendo, which is a 750 based design with improvements such as multiprocessor support (the part is a triple core), new 45 nm fabrication process and eDRAM instead of regular L2 cache; it's unknown if further changes were made to

1136-576: A quad-core device, called the Companion core, built specifically for executing tasks at a lower frequency during mobile active standby mode, video playback, and music playback. Project Kal-El ( Tegra 3 ), patented by NVIDIA, was the first SoC (System on Chip) to implement this new vSMP technology. This technology not only reduces mobile power consumption during active standby state, but also maximizes quad core performance during active usage for intensive mobile applications. Overall this technology addresses

1207-463: A small write-through cache connected to a common memory to form a shared memory system. Another early commercial Unix SMP implementation was the NUMA based Honeywell Information Systems Italy XPS-100 designed by Dan Gielan of VAST Corporation in 1985. Its design supported up to 14 processors, but due to electrical limitations, the largest marketed version was a dual processor system. The operating system

1278-540: A system bus up to 240 MHz, L2 cache prefetch features and graphics related instructions have been added to improve performance. As the added graphics-related functions match closely the ones found in the Gekko processor it is very likely that the 750CL is a shrink of the same processor for general purpose use. The 750CL is manufactured using a 90 nm copper based fabrication with Low-K dielectric and Silicon on insulator technology and features 20 million transistors on

1349-678: A system with more than one process running can run different processes on different processors. On personal computers , SMP is less useful for applications that have not been modified. If the system rarely runs more than one process at a time, SMP is useful only for applications that have been modified for multithreaded (multitasked) processing. Custom-programmed software can be written or modified to use multiple threads, so that it can make use of multiple processors. Multithreaded programs can also be used in time-sharing and server systems that support multithreading, allowing them to make more use of multiple processors. In current SMP systems, all of

1420-409: A uniprocessor system, because different programs can run on different CPUs simultaneously. Conversely, asymmetric multiprocessing (AMP) usually allows only one processor to run a program or task at a time. For example, AMP can be used in assigning specific tasks to CPU based to priority and importance of task completion. AMP was created well before SMP in terms of handling multiple CPUs, which explains

1491-436: A uniprocessor system. SMP systems can also lead to more complexity regarding instruction sets. A homogeneous processor system typically requires extra registers for "special instructions" such as SIMD (MMX, SSE, etc.), while a heterogeneous system can implement different types of hardware for different instructions/uses. When more than one program executes at the same time, an SMP system has considerably better performance than

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1562-550: Is believed to be an evolution of the Broadway architecture. The largely unconfirmed characteristics are a triple core CPU which runs at 1.24 GHz and a 45 nm process. IBM has ceased to publish a roadmap to the 750 family, in favor of marketing themselves as a custom processor vendor. Given IBM's resources, the 750 core will be produced with new features as long as there is a willing buyer. In particular, IBM has no public plans to produce an ordinary 750-based microprocessor in

1633-399: Is handled independently, this creates an embarrassingly parallel situation across the entire multi-compilation-unit project, allowing near linear scaling of compilation time. Distributed computing projects are inherently parallel by design.) Systems programmers must build support for SMP into the operating system , otherwise, the additional processors remain idle and the system functions as

1704-407: Is intended by SMP is a shared memory multiprocessor where the cost of accessing a memory location is the same for all processors; that is, it has uniform access costs when the access actually is to memory. If the location is cached, the access will be faster, but cache access times and memory access times are the same on all processors." SMP systems are tightly coupled multiprocessor systems with

1775-411: Is not so much a performance increase as the appearance that the program is running much more smoothly. Some applications, particularly building software and some distributed computing projects, run faster by a factor of (nearly) the number of additional processors. (Compilers by themselves are single threaded, but, when building a software project with multiple compilation units, if each compilation unit

1846-503: Is serialized; this and cache coherency issues cause performance to lag slightly behind the number of additional processors in the system. SMP uses a single shared system bus that represents one of the earliest styles of multiprocessor machine architectures, typically used for building smaller computers with up to 8 processors. Larger computer systems might use newer architectures such as NUMA (Non-Uniform Memory Access), which dedicates different memory banks to different processors. In

1917-573: Is the IBM's custom central processor for the Nintendo GameCube game console. Based on a PowerPC 750CXe, it adds about 50 new instructions and a modified FPU capable of some SIMD functionality. It has 256 KiB of on die L2 cache, operates at 486 MHz with a 162 MHz memory bus, is fabricated by IBM on a 180 nm process. The die size is 43 mm. The 750FX (code-named Sahara) came in 2002 and increased frequency up to 900 MHz,

1988-773: The Michigan Terminal System (MTS), used both CPUs. Both processors could access data channels and initiate I/O. In OS/360 M65MP, peripherals could generally be attached to either processor since the operating system kernel ran on both processors (though with a "big lock" around the I/O handler). The MTS supervisor (UMMPS) has the ability to run on both CPUs of the IBM System/360 model 67–2. Supervisor locks were small and used to protect individual common data structures that might be accessed simultaneously from either CPU. Other mainframes that supported SMP included

2059-510: The PowerPC 603e . Enhancements included a faster 60x system bus (66 MHz), larger L1 caches (32 KB instruction and 32 KB data), a second integer unit, an enhanced floating point unit, and higher core frequency. The 750 had support for an optional 256, 512 or 1024 KB external unified L2 cache. The cache controller and cache tags are on-die. The cache was accessed via a dedicated 64-bit bus. The 740 and 750 added dynamic branch prediction and

2130-481: The PowerPC 604e in integer performance, causing a planned 604 successor to be scrapped. The PowerPC 740 is completely pin compatible with the older 603, allowing upgrades to the PowerBook 1400, 2400, and even a prototype PowerBook 500/G3. The 750 with its L2 cache bus required more pins and thus a different package, a 360-pin ball grid array (BGA). The PowerPC 750 was used in many computers from Apple, including

2201-565: The UNIVAC 1108 II , released in 1965, which supported up to three CPUs, and the GE-635 and GE-645 , although GECOS on multiprocessor GE-635 systems ran in a master-slave asymmetric fashion, unlike Multics on multiprocessor GE-645 systems, which ran in a symmetric fashion. Starting with its version 7.0 (1972), Digital Equipment Corporation 's operating system TOPS-10 implemented the SMP feature,

PowerPC 7xx - Misplaced Pages Continue

2272-475: The iMac and the eMac . In contrast, most of its professional products used an anodized aluminum finish. Near the end of its run, the Snow iBook G3 case became opaque and white instead of translucent white and magnesium. According to Apple, all of these models are obsolete. Second Generation (Snow) Apple added a PowerPC G4 chip to the iBook Snow design on October 23, 2003, finally ending Apple's use of

2343-585: The iMac , the iBook did not feature pinstripes. Steve Jobs announced that the Key Lime color, "a little less conservative, a little more fun", was exclusive to the online Apple Store . This resulted in some crowd members booing, to which Jobs replied: "Don't you like buying on the Apple Online Store?" Compared to follow-up iBook and PowerBook notebook computers, the Clamshell iBook proved to be

2414-495: The 750GX is available, called the 750GL. 750VX (codenamed "Mojave") is a rumored, not confirmed and canceled version of the 7xx line. It would be the most powerful and featured version to date with up to 4MB of off die L3 cache, a 400Mhz DDR front side bus and the same implementation of AltiVec used in the PowerPC 970 . It was expected to clock as high as 1.8 GHz (starting at 1.5 GHz) and reported to have additional pipeline stages, and advanced power management features. It

2485-564: The PowerPC G3 chip. A slot-loading optical drive replaced the disc tray. The iBook G4 notebook also features an opaque white case finish and keyboard and a plastic display hinge. This is also the last iBook laptop released before MacBooks replaced the iBook line in 2006. According to Apple, all of these models are obsolete. The iBook keyboard lifts up, allowing installation of the AirPort (wireless) card and additional memory. This gives

2556-462: The RAM and AirPort card, accessed via two slots under the keyboard. No other modifications were possible in-warranty. There was no PCMCIA port for additional expansion capabilities. 40 screws needed to be removed to access the hard drive. The optical drive, however, can be accessed far more easily, requiring only 11 screws and one standoff to be removed. Later on, some users transplanted a 1024×768 LCD from

2627-402: The SMP architecture applies to the cores, treating them as separate processors. Professor John D. Kubiatowicz considers traditionally SMP systems to contain processors without caches. Culler and Pal-Singh in their 1998 book "Parallel Computer Architecture: A Hardware/Software Approach" mention: "The term SMP is widely used but causes a bit of confusion. [...] The more precise description of what

2698-464: The bus speed to 166 MHz and the on-die L2 cache to 512 KiB. It also featured a number of improvements to the memory subsystem: an enhanced and faster (200 MHz) 60x bus controller, a wider L2 cache bus, and the ability to lock parts of the L2 cache. It is manufactured using a 0.13 μm copper based fabrication with Low-K dielectric and Silicon on insulator technology. 750FX has 39 million transistors,

2769-504: The chart above, the system has also been supported via MorphOS (an Amiga compatible OS) since version 3.2. Display issues with the iBook line were caused by a notoriously problematic graphics chip, which could have issues with the heatsink or the BGA soldering work done at the factory. This would manifest in symptoms such as system lockups (as the graphics chip hangs from reaching the thermal limit), or visible graphical artifacts appearing on

2840-441: The data are often associated strongly with certain tasks or users. Finally, there is computer clustered multiprocessing (such as Beowulf ), in which not all memory is available to all processors. Clustering techniques are used fairly extensively to build very large supercomputers. Variable Symmetric Multiprocessing (vSMP) is a specific mobile use case technology initiated by NVIDIA. This technology includes an extra fifth core in

2911-495: The data for that task is located in memory, provided that each task in the system is not in execution on two or more processors at the same time. With proper operating system support, SMP systems can easily move tasks between processors to balance the workload efficiently. The earliest production system with multiple identical processors was the Burroughs B5000 , which was functional around 1961. However at run-time this

PowerPC 7xx - Misplaced Pages Continue

2982-606: The design. In 2015 Rochester Electronics started providing legacy support for the devices. Freescale has discontinued all 750 designs in favor of designs based on the PowerPC e500 core ( PowerQUICC III ). This list is a complete list of known 750 based designs. The pictures are illustrations and not to scale. 7.3W @ 300 MHz 7.3W @ 300 MHz 5.4W @ 400 MHz 5.4W @ 400 MHz 6.0W @ 500 MHz 10 (dd3.x) 6.0W @ 500 MHz 10 (dd3.x) 10-20 4-9.5 10-20 Symmetric multiprocessing Symmetric multiprocessing or shared-memory multiprocessing ( SMP ) involves

3053-736: The earliest system running SMP was the DECSystem 1077 dual KI10 processor system. Later KL10 system could aggregate up to 8 CPUs in a SMP manner. In contrast, DECs first multi-processor VAX system, the VAX-11/782, was asymmetric, but later VAX multiprocessor systems were SMP. Early commercial Unix SMP implementations included the Sequent Computer Systems Balance 8000 (released in 1984) and Balance 21000 (released in 1986). Both models were based on 10 MHz National Semiconductor NS32032 processors, each with

3124-774: The first of many school systems in the United States to distribute one to every student. Apple replaced the iBook line with the MacBook in May 2006 during the Mac transition to Intel processors . In the late 1990s, Apple was trimming its product line from the large number of intersecting Performa , Quadra , LC , Power Macintosh and PowerBook models to a simplified "four box" strategy: desktop and portable computers, each in both consumer and professional models. Three boxes of this strategy were already in place: The newly introduced iMac

3195-455: The high price is mainly due to radiation hardening revisions to the PowerPC 750 architecture and manufacturing, stringent quality control requirements, and extended testing of each processor chip manufactured. Motorola revised the 740/750 design in 1998 and shrunk die size to 51 mm thanks to a newer aluminium based fabrication at 0.22 μm. The speeds increased to up to 600 MHz. The 755

3266-438: The iMac, the iBook G3 had a PowerPC G3 CPU , and no legacy Apple interfaces. USB , Ethernet , modem ports and an optical drive were standard. The ports were left uncovered along the left side, as a cover was thought to be fragile and unnecessary with the iBook's new interfaces, which lacked the exposed pins of earlier connectors. Featuring a clamshell design , when the lid was closed, the hinge kept it firmly shut, so there

3337-581: The industry standard. Apple released the AirPort Wireless Base Station at the same time. There was heated debate over many things such as the aesthetics , features, weight, performance and pricing. To provide sufficient impact protection, the iBook was larger and heftier than the PowerBook of the time, and yet had lower specifications. Standard features like PC card slots were absent, and so were speculated features such as touch screens and an ultra-long battery life. The iBook gained

3408-523: The keyboard a "spongy" effect, especially in G3 iBooks with the translucent keyboard. The "sponginess" was corrected in the PowerPC G4 models. Accessing the hard disk drive is complex and time-consuming, involving partial disassembly of the unit and the removal of over 30 different-sized screws. The memory in the iBook G4 is covered by a removable AirPort card, and accessible by removing the RAM shield with

3479-418: The label "Barbie's toilet seat", due to the distinctive design. Nevertheless, this same design made the iBook G3 unmistakable in movies and television shows. The iBook was a commercial success. The line continually received processor, memory, hard disk upgrades and new colors. FireWire and video out were later added. The design was discontinued in May 2001, in favor of the new "Dual USB" iBooks. The design

3550-510: The lack of performance based on the example provided. In cases where an SMP environment processes many jobs, administrators often experience a loss of hardware efficiency. Software programs have been developed to schedule jobs and other functions of the computer so that the processor utilization reaches its maximum potential. Good software packages can achieve this maximum potential by scheduling each CPU separately, as well as being able to integrate multiple SMP machines and clusters. Access to RAM

3621-473: The main memory data access and to reduce the system bus traffic. Processors may be interconnected using buses, crossbar switches or on-chip mesh networks. The bottleneck in the scalability of SMP using buses or crossbar switches is the bandwidth and power consumption of the interconnect among the various processors, the memory, and the disk arrays. Mesh architectures avoid these bottlenecks, and provide nearly linear scalability to much higher processor counts at

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3692-409: The more recent white iBook into a clamshell iBook. This is only possible with the "FireWire" and "FireWire SE" models, as they have 8 MB of video RAM; the older ones only have 4 MB. All clamshell iBooks shipped with Mac OS 8.6 or 9.0. All clamshell iBooks supported Mac OS X 10.0 through 10.3.9 . Mac OS X Tiger (v10.4) can also be installed. Apple debuted the next-generation iBook G3 at

3763-672: The more reliable model. The original iBook is on exhibition at the London Design Museum and the Yale University Art Gallery . Vestiges of design ideas first adopted in the iBook G3 can still be seen today: moving interface ports from the back to the sides and leaving them uncovered, omitting a latch for the computer's lid, and providing multiple color options. According to Apple, all of these models are obsolete. First Generation (Clamshell) The original iBook's only customer-serviceable parts were

3834-556: The need for increase in battery life performance during active and standby usage by reducing the power consumption in mobile processors. Unlike current SMP architectures, the vSMP Companion core is OS transparent meaning that the operating system and the running applications are totally unaware of this extra core but are still able to take advantage of it. Some of the advantages of the vSMP architecture includes cache coherency, OS efficiency, and power optimization. The advantages for this architecture are explained below: These advantages lead

3905-422: The original iMac . The RAD750 is a radiation-hardened processor, based on the PowerPC 750. It is intended for use in high radiation environments such as experienced on board satellites and other spacecraft . The RAD750 was released for purchase in 2001. The Mars Science Laboratory ( Curiosity ), Mars Reconnaissance Orbiter , Mars 2020 ( Perseverance ) and James Webb Space Telescope spacecraft have

3976-618: The processors are tightly coupled inside the same box with a bus or switch; on earlier SMP systems, a single CPU took an entire cabinet. Some of the components that are shared are global memory, disks, and I/O devices. Only one copy of an OS runs on all the processors, and the OS must be designed to take advantage of this architecture. Some of the basic advantages involves cost-effective ways to increase throughput. To solve different problems and tasks, SMP applies multiple processors to that one problem, known as parallel programming . However, there are

4047-591: The repair extension program. Owners of iBooks that required expensive repairs for these problems submitted new class action lawsuits in December 2006. On May 2, 2007, the Danish Consumer Board published an extensive 3rd party report concerning the Apple iBook G4 logic board issue. A press release referred to the global consequences that this could have for possible guarantee claims. Some owners of

4118-530: The sacrifice of programmability: Serious programming challenges remain with this kind of architecture because it requires two distinct modes of programming; one for the CPUs themselves and one for the interconnect between the CPUs. A single programming language would have to be able to not only partition the workload, but also comprehend the memory locality, which is severe in a mesh-based architecture. SMP systems allow any processor to work on any task no matter where

4189-567: The screen (from the graphics chip failing). Apple initiated the "iBook Logic Board Repair Extension Program" in January 2004, which covered the expense of repairing display problems of iBook G3 models for three years. In June 2004, the Repair Extension Program was expanded to cover all White G3 iBooks. Early models of the iBook G4 also suffered from display problems similar to those of the iBook G3, but were not covered by

4260-471: The vSMP architecture to considerably benefit over other architectures using asynchronous clocking technologies. IBook iBook is a line of laptop computers designed, manufactured, and sold by Apple Computer from 1999 to 2006. The line targeted entry-level, consumer and education markets, with lower specifications and prices than the PowerBook , Apple's higher-end line of laptop computers. It

4331-402: The volume of the model it replaced, being smaller in all three dimensions. Despite that, it added an extra USB port and a higher resolution screen. Apple claimed the compact design did not sacrifice durability, saying it was "Twice as durable" as the previous model. With this revision, Apple began transitioning to translucent and white polycarbonate casings in most of its consumer line, such as

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4402-477: Was asymmetric , with one processor restricted to application programs while the other processor mainly handled the operating system and hardware interrupts. The Burroughs D825 first implemented SMP in 1962. IBM offered dual-processor computer systems based on its System/360 Model 65 and the closely related Model 67 and 67–2. The operating systems that ran on these machines were OS/360 M65MP and TSS/360 . Other software developed at universities, notably

4473-475: Was a 7xx processor from IBM. It has an on-die 1 MB L2 cache, a top frequency of 1.1 GHz, and support for bus speeds up to 200 MHz among other enhancements compared to 750FX. It is manufactured using a 0.13 μm process with copper interconnects, low-K dielectric , and silicon on insulator technology. The 750GX has 44 million transistors, a die size of 52 mm and consumes less than 9 W at 1 GHz at typical loads. A low-power version of

4544-427: Was clearly influenced by Apple's consumer desktop, the iMac . In fact, one of the marketing slogans for the iBook was "iMac to go." The clamshell design also echoed the eMate 300 . Apple continued its trend of using transparent colored plastics for the shell, and released the iBook clamshell series in several colors, starting with Blueberry and Tangerine, later adding Indigo, Graphite and Key Lime colors. However, unlike

4615-537: Was derived and ported by VAST Corporation from AT&T 3B20 Unix SysVr3 code used internally within AT&;T. Earlier non-commercial multiprocessing UNIX ports existed, including a port named MUNIX created at the Naval Postgraduate School by 1975. Time-sharing and server systems can often use SMP without changes to applications, as they may have multiple processes running in parallel, and

4686-406: Was no need for a latch on the screen. The hinge included an integrated carrying handle. Additional power connectors on the bottom surface allowed multiple iBook G3s to be charged on a custom-made rack. The iBook G3 was the first Mac to use Apple's new "Unified Logic Board Architecture", which condensed all of the machine's core features into two chips, and added AGP and Ultra DMA support. The iBook

4757-529: Was reported to be finished and ready for production in December 2003, but said timing was too late for it to get significant orders seeing Apple's iBook line had switched to G4s in October the same year, and thus it quickly fell off the roadmap. It was never released or heard from since. There were follow up chips planned, such the 750VXe, which would have surpassed 2 GHz. The 750CL is an evolved 750CXe, with speeds ranging from 400 MHz to 1 GHz with

4828-646: Was the consumer desktop, the Power Macintosh G3 filled the professional desktop box, and the PowerBook G3 line served as the professional portable line. This left only the consumer portable space empty, leading to much rumor on the Internet of potential designs and features. Putting an end to this speculation, on July 21, 1999, Steve Jobs unveiled the iBook G3 during the keynote presentation of Macworld Conference & Expo , New York City . Like

4899-501: Was the first mainstream computer designed and sold with integrated wireless networking . On the iBook's introduction, Phil Schiller , Apple's VP of Marketing, held an iBook while jumping off a height as data from the computer was transferred to another in order to demonstrate the wireless networking capability. The display bezel contained the wireless antenna, which attached to an optional internal wireless card. Lucent Technologies helped create this wireless capability which established

4970-412: Was the first mass consumer product to offer Wi-Fi network connectivity, which was then branded by Apple as AirPort . The iBook had three different designs during its lifetime. The first, known as the "Clamshell", was inspired by the design of Apple's popular iMac line at the time. It was a significant departure from previous portable computer designs due to its shape, bright colors, incorporation of

5041-496: Was used in some iBook models. After this model, Motorola chose not to keep developing the 750 processors in favour of their PowerPC 7400 processor and other cores. IBM continued to develop the PowerPC 750 line and introduced the PowerPC 750CX (code-named Sidewinder) in 2000. It has a 256 KiB on-die L2 cache; this increased performance while reducing power consumption and complexity. At 400 MHz, it drew under 4 W. The 750CX had 20 million transistors including its L2 cache. It had

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