Misplaced Pages

Pentium

Article snapshot taken from Wikipedia with creative commons attribution-sharealike license. Give it a read and then ask your questions in the chat. We can research this topic together.
#37962

88-481: Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The original Pentium was Intel's fifth generation processor, succeeding the i486 ; Pentium was Intel's flagship processor line for over a decade until the introduction of the Intel Core line in 2006. Pentium-branded processors released from 2009 onwards were considered entry-level products positioned above

176-618: A 64 KB (one segment) stack in memory supported by computer hardware . Only words (two bytes) can be pushed to the stack. The stack grows toward numerically lower addresses, with SS:SP pointing to the most recently pushed item. There are 256 interrupts , which can be invoked by both hardware and software. The interrupts can cascade, using the stack to store the return address . The original Intel 8086 and 8088 have fourteen 16- bit registers. Four of them (AX, BX, CX, DX) are general-purpose registers (GPRs), although each may have an additional purpose; for example, only CX can be used as

264-579: A backward compatible version of this functionality on the same microprocessor as the main processor. In addition to this, modern x86 designs also contain a SIMD -unit (see SSE below) where instructions can work in parallel on (one or two) 128-bit words, each containing two or four floating-point numbers (each 64 or 32 bits wide respectively), or alternatively, 2, 4, 8 or 16 integers (each 64, 32, 16 or 8 bits wide respectively). The presence of wide SIMD registers means that existing x86 processors can load or store up to 128 bits of memory data in

352-403: A compatible design) and the scalability of x86 chips in the form of modern multi-core CPUs, is underlining x86 as an example of how continuous refinement of established industry standards can resist the competition from completely new architectures. The table below lists processor models and model series implementing various architectures in the x86 family, in chronological order. Each line item

440-539: A counter with the loop instruction. Each can be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL). Two pointer registers have special roles: SP (stack pointer) points to the "top" of the stack , and BP (base pointer) is often used to point at some other place in the stack, typically above the local variables (see frame pointer ). The registers SI, DI, BX and BP are address registers , and may also be used for array indexing. One of four possible 'segment registers' (CS, DS, SS and ES)

528-476: A major change to the architecture referred to as X86S (formerly known as X86-S). The S in X86S stands for "simplification", which aims to remove support for legacy execution modes and instructions. A processor implementing this proposal would start execution directly in long mode and would only support 64-bit operating systems. 32-bit code would only be supported for user applications running in ring 3, and would use

616-812: A maximum of 1.7 GB of memory, for resolutions up to 4096×2304 @ 60 Hz using Display Port supporting up to 3 displays. In Q1 2017 Intel released the Kaby Lake -based Pentium G4560; it is the first Pentium-branded CPU since the NetBurst -based Pentium 4 to support hyper-threading , a feature available in some " Core "-branded products. Features include a clock speed of 3.5 GHz with four threads, 3 MB of L3 cache and Intel HD 610 integrated graphics. All Coffee Lake Pentium processors support Hyper-threading , and integrated Intel UHD Graphics . All Comet Lake Pentium processors support Hyper-threading , and integrated Intel UHD 610 Graphics . Due to its prominence,

704-547: A memory location. However, this memory operand may also be the destination (or a combined source and destination), while the other operand, the source, can be either register or immediate. Among other factors, this contributes to a code size that rivals eight-bit machines and enables efficient use of instruction cache memory. The relatively small number of general registers (also inherited from its 8-bit ancestors) has made register-relative addressing (using small immediate offsets) an important method of accessing operands, especially on

792-560: A more complex micro-op which fits the execution model better and thus can be executed faster or with fewer machine resources involved. Another way to try to improve performance is to cache the decoded micro-operations, so the processor can directly access the decoded micro-operations from a special cache, instead of decoding them again. Intel followed this approach with the Execution Trace Cache feature in their NetBurst microarchitecture (for Pentium 4 processors) and later in

880-580: A new Pentium G6950 processor based on the Clarkdale design was introduced based on the Westmere refresh of Nehalem, which were followed by the mobile P6xxx based on Arrandale a few months later. On January 7, 2010, Intel launched a new Pentium model using the Clarkdale chip in parallel with other desktop and mobile CPUs based on their new Westmere microarchitecture. The first model in this series

968-407: A particular frequency, or higher frequency within the same power limit. Desktop processors: Mobile processors: Features common to desktop Kaby Lake CPUs: Num of cores Features common to desktop Kaby Lake-X CPUs: Num of cores Maximum PCIe Lanes: 16. Release date: Q1 2017. Num of cores clock rate Num of cores clock rate In late 2016, it was reported that Intel had been working on

SECTION 10

#1732757790038

1056-701: A processor family codenamed “Kaby Lake R” ("R" for "Refresh"). On August 21, 2017, the eighth generation mobile CPUs were announced. The first products released were four "Kaby Lake R" processors with a 15W TDP. This marketing is distinct from previous generational changes of the Core product line, where a new generation coincided with a new microarchitecture. Intel has stated that the 8th generation would be based on multiple microarchitectures, including Kaby Lake R, Coffee Lake , and Cannon Lake . Num of cores clock rate date Maximum number of PCIe lanes: 8. One-package processors with AMD Radeon discrete graphics chip - it

1144-496: A response to the successful 8080-compatible Zilog Z80 , the x86 line soon grew in features and processing power. Today, x86 is ubiquitous in both stationary and portable personal computers, and is also used in midrange computers , workstations , servers, and most new supercomputer clusters of the TOP500 list. A large amount of software , including a large list of x86 operating systems are using x86-based hardware. Modern x86

1232-670: A single instruction and also perform bitwise operations (although not integer arithmetic ) on full 128-bits quantities in parallel. Intel's Sandy Bridge processors added the Advanced Vector Extensions (AVX) instructions, widening the SIMD registers to 256 bits. The Intel Initial Many Core Instructions implemented by the Knights Corner Xeon Phi processors, and the AVX-512 instructions implemented by

1320-497: A solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186 , 80286 , 80386 and 80486 . Colloquially, their names were "186", "286", "386" and "486". The term is not synonymous with IBM PC compatibility , as this implies a multitude of other computer hardware . Embedded systems and general-purpose computers used x86 chips before

1408-470: Is allowed for almost all instructions. The largest native size for integer arithmetic and memory addresses (or offsets ) is 16, 32 or 64 bits depending on architecture generation (newer processors include direct support for smaller integers as well). Multiple scalar values can be handled simultaneously via the SIMD unit present in later generations, as described below. Immediate addressing offsets and immediate data may be expressed as 8-bit quantities for

1496-691: Is characterized by significantly improved or commercially successful processor microarchitecture designs. At various times, companies such as IBM , VIA , NEC , AMD , TI , STM , Fujitsu , OKI , Siemens , Cyrix , Intersil , C&T , NexGen , UMC , and DM&P started to design or manufacture x86 processors (CPUs) intended for personal computers and embedded systems. Other companies that designed or manufactured x86 or x87 processors include ITT Corporation , National Semiconductor , ULSI System Technology, and Weitek . Such x86 implementations were seldom simple copies but often employed different internal microarchitectures and different solutions at

1584-481: Is not supported in hardware. Both OpenGL 4.6 and OpenCL 3.0 are now supported. Kaby Lake is the first Core architecture to support hyper-threading for the Pentium-branded desktop CPU SKU. Kaby Lake also features the first overclocking-enabled i3-branded CPU. Kaby Lake features the same CPU core and performance per MHz as Skylake . Features specific to Kaby Lake include: Starting from this generation,

1672-463: Is one of the two modes only available in long mode . The addressing modes were not dramatically changed from 32-bit mode, except that addressing was extended to 64 bits, virtual addresses are now sign extended to 64 bits (in order to disallow mode bits in virtual addresses), and other selector details were dramatically reduced. In addition, an addressing mode was added to allow memory references relative to RIP (the instruction pointer ), to ease

1760-587: Is relatively uncommon in embedded systems , however, and small low power applications (using tiny batteries), and low-cost microprocessor markets, such as home appliances and toys, lack significant x86 presence. Simple 8- and 16-bit based architectures are common here, as well as simpler RISC architectures like RISC-V , although the x86-compatible VIA C7 , VIA Nano , AMD 's Geode , Athlon Neo and Intel Atom are examples of 32- and 64-bit designs used in some relatively low-power and low-cost segments. There have been several attempts, including by Intel, to end

1848-507: Is the Atom line, which is an independent design. X86 x86 (also known as 80x86 or the 8086 family ) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088 . The 8086 was introduced in 1978 as a fully 16-bit extension of 8-bit Intel's 8080 microprocessor, with memory segmentation as

SECTION 20

#1732757790038

1936-595: Is the Pentium G6950. The Clarkdale chip is also used in the Core i3-5xx and Core i5-6xx series and features a 32 nm process (as it is based on the Westmere microarchitecture), integrated memory controller and 45 nm graphics controller and a third-level cache. In the Pentium series, some features of Clarkdale are disabled, including AES-NI , hyper-threading (versus Core i3), and the graphics controller in

2024-491: Is used to form a memory address. In the original 8086 / 8088 / 80186 / 80188 every address was built from a segment register and one of the general purpose registers. For example ds:si is the notation for an address formed as [16 * ds + si] to allow 20-bit addressing rather than 16 bits, although this changed in later processors. At that time only certain combinations were supported. The FLAGS register contains flags such as carry flag , overflow flag and zero flag . Finally,

2112-458: The fstsw instruction, and it is common to simply use some of its bits for branching by copying it into the normal FLAGS. In the Intel 80286 , to support protected mode , three special registers hold descriptor table addresses (GDTR, LDTR, IDTR ), and a fourth task register (TR) is used for task switching. The 80287 is the floating-point coprocessor for the 80286 and has the same registers as

2200-470: The 6x86 was significantly faster than the Pentium on integer code. AMD later managed to grow into a serious contender with the K6 set of processors, which gave way to the very successful Athlon and Opteron . There were also other contenders, such as Centaur Technology (formerly IDT ), Rise Technology , and Transmeta . VIA Technologies ' energy efficient C3 and C7 processors, which were designed by

2288-496: The 80486 and all subsequent x86 models, the floating-point processing unit (FPU) is integrated on-chip. The Pentium MMX added eight 64-bit MMX integer vector registers (MM0 to MM7, which share lower bits with the 80-bit-wide FPU stack). With the Pentium III , Intel added a 32-bit Streaming SIMD Extensions (SSE) control/status register (MXCSR) and eight 128-bit SSE floating-point registers (XMM0 to XMM7). Starting with

2376-627: The 80486 processor and were marketed from 1993 to 1999. Some versions of these were available as Pentium OverDrive that would fit into older CPU sockets . In parallel with the P5 microarchitecture, Intel developed the P6 microarchitecture and started marketing it as the Pentium Pro for the high-end market in 1995. It introduced out-of-order execution and an integrated second-level cache on dual-chip processor package. The second P6 generation replaced

2464-406: The 8088 and 80286 were still in common use, the term x86 usually represented any 8086-compatible CPU. Today, however, x86 usually implies binary compatibility with the 32-bit instruction set of the 80386 . This is due to the fact that this instruction set has become something of a lowest common denominator for many modern operating systems and also probably because the term became common after

2552-531: The 8088 , Banias , Dothan , Conroe , Sandy Bridge , Ivy Bridge , and Skylake ), Kaby Lake's development was led by Intel's Israeli team, based in Haifa . Intel Israel Development Centers manager Ran Senderovitz said: "When we started out on the project, we were only thinking about basic improvements from the previous generation. But we began looking at things differently with a lot of innovation and determination and we achieved major improvements." He added that

2640-573: The AMD Opteron processor, the x86 architecture extended the 32-bit registers into 64-bit registers in a way similar to how the 16 to 32-bit extension took place. An R -prefix (for "register") identifies the 64-bit registers (RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, RFLAGS, RIP), and eight additional 64-bit general registers (R8–R15) were also introduced in the creation of x86-64 . Also, eight more SSE vector registers (XMM8–XMM15) were added. However, these extensions are only usable in 64-bit mode, which

2728-598: The Celeron brand for low-priced processors. With the 2006 introduction of the Intel Core brand as the company's new flagship line of processors, the Pentium series was to be discontinued. However, due to a demand for mid-range dual-core processors, the Pentium brand was repurposed to be Intel's mid-range processor series, between the Celeron and Core series, continuing with the Pentium Dual-Core line. In 2009,

Pentium - Misplaced Pages Continue

2816-653: The Centaur company, were sold for many years following their release in 2005. Centaur's 2008 design, the VIA Nano , was their first processor with superscalar and speculative execution . It was introduced at about the same time (in 2008) as Intel introduced the Intel Atom , its first "in-order" processor after the P5 Pentium . Many additions and extensions have been added to the original x86 instruction set over

2904-461: The machine code format was expanded. To provide backward compatibility, segments with executable code can be marked as containing either 16-bit or 32-bit instructions. Special prefixes allow inclusion of 32-bit instructions in a 16-bit segment or vice versa. The 80386 had an optional floating-point coprocessor, the 80387 ; it had eight 80-bit wide registers: st(0) to st(7), like the 8087 and 80287. The 80386 could also use an 80287 coprocessor. With

2992-646: The "Dual-Core" suffix was dropped, and new x86 processors started carrying the plain Pentium name again. In 2014, Intel released the Pentium 20th Anniversary Edition , to mark the 20th anniversary of the Pentium brand. These processors are unlocked and highly overclockable. In 2017, Intel split the Pentium branding into two line-ups. Pentium Silver targets low-power devices and shares architecture with Atom and Celeron, while Pentium Gold targets entry-level desktops and uses existing architecture, such as Kaby Lake and Coffee Lake . In September 2022, Intel announced that

3080-471: The 8087 with the same data formats. With the advent of the 32-bit 80386 processor, the 16-bit general-purpose registers, base registers, index registers, instruction pointer, and FLAGS register , but not the segment registers, were expanded to 32 bits. The nomenclature represented this by prefixing an " E " (for "extended") to the register names in x86 assembly language . Thus, the AX register corresponds to

3168-537: The CPU architecture has changed from Skylake , resulting in identical IPC (Instructions Per Clock). Kaby Lake features a new graphics architecture to improve performance in 3D graphics and 4K video playback. It adds native HDCP 2.2 support, along with fixed function decode of H.264 (AVC), HEVC Main and Main10/10-bit, and VP9 10-bit and 8-bit video. Hardware encode is supported for H.264 (AVC), HEVC Main10/10-bit, and VP9 8-bit video. VP9 10-bit encode

3256-572: The Core microarchitecture use the Allendale and Wolfdale -3M designs for desktop processors and Merom -2M for mobile processors. In 2009, Intel changed the naming system for Pentium processors, renaming the Wolfdale-3M based processors to Pentium , without the Dual-Core name, and introduced new single- and dual-core processors based on Penryn under the Pentium name. The Penryn core is

3344-585: The Decoded Stream Buffer (for Core-branded processors since Sandy Bridge). Transmeta used a completely different method in their Crusoe x86 compatible CPUs. They used just-in-time translation to convert x86 instructions to the CPU's native VLIW instruction set. Transmeta argued that their approach allows for more power efficient designs since the CPU can forgo the complicated decode step of more traditional x86 implementations. Addressing modes for 16-bit processor modes can be summarized by

3432-877: The Knights Landing Xeon Phi processors and by Skylake-X processors, use 512-bit wide SIMD registers. During execution , current x86 processors employ a few extra decoding steps to split most instructions into smaller pieces called micro-operations. These are then handed to a control unit that buffers and schedules them in compliance with x86-semantics so that they can be executed, partly in parallel, by one of several (more or less specialized) execution units . These modern x86 designs are thus pipelined , superscalar , and also capable of out of order and speculative execution (via branch prediction , register renaming , and memory dependence prediction ), which means they may execute multiple (partial or complete) x86 instructions simultaneously, and not necessarily in

3520-616: The LGA1150 socket form factor. Broadwell-based Pentiums were launched in Q1 2015 using a 14 nm process (e.g. the dual-core 1.9 GHz Intel Pentium 3805U with 2 MB cache). They used the FCBGA1168 socket. Skylake-based Pentium processors support up to 64 GB RAM. Features like Turbo Boost , Intel vPro , Hyper-Threading are not available. Supports AES-NI and RDRAND . Integrated graphics are provided by Intel HD Graphics 510, utilizing

3608-522: The P6 microarchitecture named Pentium M , which was much more power-efficient than the Mobile Pentium 4, Pentium 4 M, and Pentium III M. Dual-core versions of the Pentium M were developed under the code name Yonah and sold under the marketing names Core Duo and Pentium Dual-Core . Unlike Pentium D, it integrated both cores on one chip. From this point, the Intel Core brand name was used for

Pentium - Misplaced Pages Continue

3696-540: The PC-compatible market started , some of them before the IBM PC (1981) debut. As of June 2022 , most desktop and laptop computers sold are based on the x86 architecture family, while mobile categories such as smartphones or tablets are dominated by ARM . At the high end, x86 continues to dominate computation-intensive workstation and cloud computing segments. In the 1980s and early 1990s, when

3784-654: The Pentium II, the Celeron brand was used for low-end versions of most Pentium processors with a reduced feature set such as a smaller cache or missing power management features. In 2000, Intel introduced a new microarchitecture named NetBurst , with a much longer pipeline enabling higher clock frequencies than the P6-based processors. Initially, these were named Pentium 4 , and the high-end versions have since been named simply Xeon . As with Pentium III, there are both Mobile Pentium 4 and Pentium 4 M processors for

3872-531: The Pentium SU4000 series together with the Celeron SU2000 and Core 2 Duo SU7000 series, which are dual-core CULV processors based on Penryn-3M and using 800 MHz FSB. The Pentium SU4000 series has 2 MB L2 cache but is otherwise basically identical to the other two lines. The Nehalem microarchitecture was introduced in late 2008 as a successor to the Core microarchitecture, and in early 2010,

3960-414: The Pentium and Celeron brands were to be replaced with the new "Intel Processor" branding for low-end processors in laptops from 2023 onwards. This applied to desktops using Pentium and Celeron processors as well, and both brands were discontinued in 2023 in favor of "Intel Processor" branded processors. The original Intel P5 or Pentium and Pentium MMX processors were the superscalar follow-on to

4048-544: The Pentium and Celeron brands were to be replaced with the new "Intel Processor" branding for low-end processors in laptops from 2023 onwards. This applied to desktops using Pentium processors as well, and was discontinued around the same time laptops stopped using Pentium processors in favor of "Intel Processor" processors in 2023. During development, Intel generally identifies processors with codenames , such as Prescott , Willamette , Coppermine , Katmai , Klamath , or Deschutes . These usually become widely known, even after

4136-421: The Pentium runs at 533 MHz, while in the Core i3 i3-5xx series they run at 733 MHz, and Dual Video Decode that enables Blu-ray picture-in picture hardware acceleration, and support for Deep Color and xvYCC . The memory controller in the Pentium supports DDR3-1066 max, the same as the Core i3 i3-5xx series. The L3 cache is also 1 MB less than in the Core i3-5xx series. The Sandy Bridge microarchitecture

4224-477: The United States, but was denied because a series of numbers was considered to lack trademark distinctiveness . Following Intel's prior series of 8086 , 80186 , 80286 , 80386 , and 80486 microprocessors, the firm's first P5-based processor was released as the original Intel Pentium on March 22, 1993. Marketing firm Lexicon Branding was hired to coin a name for the new processor. The suffix -ium

4312-434: The advanced but delayed 5k86 ( K5 ), which, internally, was closely based on AMD's earlier 29K RISC design; similar to NexGen 's Nx586 , it used a strategy such that dedicated pipeline stages decode x86 instructions into uniform and easily handled micro-operations , a method that has remained the basis for most x86 designs to this day. Some early versions of these microprocessors had heat dissipation problems. The 6x86

4400-415: The art, had been planned for 2021; as of March 2022 the release had not taken place, however. The instruction set architecture has twice been extended to a larger word size. In 1985, Intel released the 32-bit 80386 (later known as i386) which gradually replaced the earlier 16-bit chips in computers (although typically not in embedded systems ) during the following years; this extended programming model

4488-1127: The built-in GPus core supports HAGS in the Windows 10 version of 2004 or newer, but currently support is only provided with insider drivers. Intel began to add Kaby Lake support to the Linux kernel on version 4.5. A P state bug was fixed in kernel 4.10 that had prevented motherboards from activating the processors' turbo frequencies. Under new policies established in January 2016, Microsoft only supports an NT 10.0-based Windows platform on newly-released CPU microarchitectures, beginning with Kaby Lake and AMD Bristol Ridge . Therefore, Microsoft only supports Kaby Lake under Windows 10 , and Windows Update blocks updates from being installed on Kaby Lake systems running versions older than Windows 10. In support of this restriction, Intel provides chipset drivers for Windows 10 only, although VirtualBox provides drivers for other versions. An enthusiast-created modification

SECTION 50

#1732757790038

4576-409: The corresponding YMM register. Kaby Lake Kaby Lake is Intel 's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake , Kaby Lake is produced using a 14 nanometer manufacturing process technology . Breaking with Intel's previous " tick–tock " manufacturing and design model, Kaby Lake represents the optimized step of

4664-515: The electronic and physical levels. Quite naturally, early compatible microprocessors were 16-bit, while 32-bit designs were developed much later. For the personal computer market, real quantities started to appear around 1990 with i386 and i486 compatible processors, often named similarly to Intel's original chips. After the fully pipelined i486 , in 1993 Intel introduced the Pentium brand name (which, unlike numbers, could be trademarked ) for their new set of superscalar x86 designs. With

4752-401: The execution units with the decode steps opens up possibilities for more analysis of the (buffered) code stream, and therefore permits detection of operations that can be performed in parallel, simultaneously feeding more than one execution unit. The latest processors also do the opposite when appropriate; they combine certain x86 sequences (such as a compare followed by a conditional jump) into

4840-501: The faster, higher-end i-series processors by lower clock rates and disabling some features, such as hyper-threading , virtualization and sometimes L3 cache . In 2017, the Pentium brand was split up into two separate lines using the Pentium name: Pentium Silver, aiming for low-power devices using the Atom and Celeron architectures; and Pentium Gold, aiming for entry-level desktop and using existing architectures such as Kaby Lake or Coffee Lake . In September 2022, Intel announced that

4928-549: The first two actively produce modern 64-bit designs, leading to what has been called a "duopoly" of Intel and AMD in x86 processors. However, in 2014 the Shanghai-based Chinese company Zhaoxin , a joint venture between a Chinese company and VIA Technologies, began designing VIA based x86 processors for desktops and laptops. The release of its newest "7" family of x86 processors (e.g. KX-7000), which are not quite as fast as AMD or Intel chips but are still state of

5016-528: The formula: Addressing modes for 32-bit x86 processor modes can be summarized by the formula: Addressing modes for the 64-bit processor mode can be summarized by the formula: Instruction relative addressing in 64-bit code (RIP + displacement, where RIP is the instruction pointer register ) simplifies the implementation of position-independent code (as used in shared libraries in some operating systems). The 8086 had 64 KB of eight-bit (or alternatively 32 K-word of 16-bit ) I/O space, and

5104-399: The frequently occurring cases or contexts where a −128..127 range is enough. Typical instructions are therefore 2 or 3 bytes in length (although some are much longer, and some are single-byte). To further conserve encoding space, most registers are expressed in opcodes using three or four bits, the latter via an opcode prefix in 64-bit mode, while at most one operand to an instruction can be

5192-501: The implementation of position-independent code , used in shared libraries in some operating systems. SIMD registers XMM0–XMM15 (XMM0–XMM31 when AVX-512 is supported). SIMD registers YMM0–YMM15 (YMM0–YMM31 when AVX-512 is supported). Lower half of each of the YMM registers maps onto the corresponding XMM register. SIMD registers ZMM0–ZMM31. Lower half of each of the ZMM registers maps onto

5280-408: The instruction pointer (IP) points to the next instruction that will be fetched from memory and then executed; this register cannot be directly accessed (read or written) by a program. The Intel 80186 and 80188 are essentially an upgraded 8086 or 8088 CPU, respectively, with on-chip peripherals added, and they have the same CPU registers as the 8086 and 8088 (in addition to interface registers for

5368-441: The introduction of the 80386 in 1985. A few years after the introduction of the 8086 and 8088, Intel added some complexity to its naming scheme and terminology as the "iAPX" of the ambitious but ill-fated Intel iAPX 432 processor was tried on the more successful 8086 family of chips, applied as a kind of system-level prefix. An 8086 system, including coprocessors such as 8087 and 8089 , and simpler Intel-specific system chips,

SECTION 60

#1732757790038

5456-410: The laptop market, with Pentium 4 M denoting the more power-efficient versions. Enthusiast versions of the Pentium 4 with the highest clock rates were named Pentium 4 Extreme Edition . The Pentium D was the first multi-core Pentium, integrating two Pentium 4 chips in one package and was available as the enthusiast Pentium Extreme Edition . In 2003, Intel introduced a new processor based on

5544-475: The low-end Atom and Celeron series, but below the faster Core lineup and workstation/server Xeon series. The later Pentiums, which have little more than their name in common with earlier Pentiums, were based on both the architecture used in Atom and that of Core processors. In the case of Atom architectures, Pentiums were the highest performance implementations of the architecture. Pentium processors with Core architectures prior to 2017 were distinguished from

5632-447: The lower 16 bits of the new 32-bit EAX register, SI corresponds to the lower 16 bits of ESI, and so on. The general-purpose registers, base registers, and index registers can all be used as the base in addressing modes, and all of those registers except for the stack pointer can be used as the index in addressing modes. Two new segment registers (FS and GS) were added. With a greater number of registers, instructions and operands,

5720-579: The mainstream Intel processors, and the Pentium brand became a low-end version between Celeron and Core. All Pentium M based designs including Yonah are for the mobile market. The Pentium Dual-Core name continued to be used when the Yonah design was extended with 64-bit support, now named the Core microarchitecture . This eventually replaced all NetBurst-based processors across the four brands Celeron, Pentium, Core, and Xeon. Pentium Dual-Core processors based on

5808-604: The market dominance of the "inelegant" x86 architecture designed directly from the first simple 8-bit microprocessors. Examples of this are the iAPX 432 (a project originally named the Intel 8800 ), the Intel 960 , Intel 860 and the Intel/Hewlett-Packard Itanium architecture. However, the continuous refinement of x86 microarchitectures , circuitry and semiconductor manufacturing would make it hard to replace x86 in many segments. AMD's 64-bit extension of x86 (which Intel eventually responded to with

5896-447: The motherboard manufacturer releases a BIOS update with the fix. Thermal design power (TDP) is the designed maximum heat generated by the chip running a specific workload at base clock. On a single microarchitecture, as the heat produced increases with voltage and frequency, this thermal design limit can also limit the maximum frequency of the processor. However, CPU testing and binning allows for products with lower voltage/power at

5984-473: The name EM64T and finally using Intel 64. Microsoft and Sun Microsystems / Oracle also use term "x64", while many Linux distributions , and the BSDs also use the "amd64" term. Microsoft Windows, for example, designates its 32-bit versions as "x86" and 64-bit versions as "x64", while installation files of 64-bit Windows versions are required to be placed into a directory called "AMD64". In 2023, Intel proposed

6072-455: The newer process–architecture–optimization model. Kaby Lake began shipping to manufacturers and OEMs in the second quarter of 2016, with its desktop chips officially launched in January 2017. In August 2017, Intel announced Kaby Lake Refresh ( Kaby Lake R ) marketed as the 8th generation mobile CPUs, breaking the long cycle where architectures matched the corresponding generations of CPUs and meanwhile also supporting Windows 11 . Skylake

6160-690: The original P5 with the Pentium II and rebranded the high-end version as Pentium II Xeon . It was followed by a third version named the Pentium III and Pentium III Xeon respectively. The Pentium II line added the MMX instructions that were also present in the Pentium MMX. Versions of these processors for the laptop market were initially named Mobile Pentium II and Mobile Pentium III , later versions were named Pentium III-M . Starting with

6248-444: The performance of the seventh generation chips was improved by 12% for applications and 19% for Internet use compared with the sixth generation chips. Third-party benchmarks do not confirm these percentages as far as gaming is concerned. Built on an improved 14 nm process (14FF+), Kaby Lake features faster CPU clock speeds, clock speed changes, and higher Turbo frequencies. Beyond these process and clock speed changes, little of

6336-454: The peripherals). The 8086, 8088, 80186, and 80188 can use an optional floating-point coprocessor, the 8087 . The 8087 appears to the programmer as part of the CPU and adds eight 80-bit wide registers, st(0) to st(7), each of which can hold numeric data in one of seven formats: 32-, 64-, or 80-bit floating point, 16-, 32-, or 64-bit (binary) integer, and 80-bit packed decimal integer. It also has its own 16-bit status register accessible through

6424-402: The processors are given official names on launch. The original Pentium-branded CPUs were expected to be named 586 or i586, to follow the naming convention of prior generations ( 286 , i386 , i486 ). However, as the firm wanted to prevent their competitors from branding their processors with similar names (as AMD had done with their Am486 ), Intel filed a trademark application on the name in

6512-418: The same order as given in the instruction stream. Some Intel CPUs ( Xeon Foster MP , some Pentium 4 , and some Nehalem and later Intel Core processors) and AMD CPUs (starting from Zen ) are also capable of simultaneous multithreading with two threads per core ( Xeon Phi has four threads per core). Some Intel CPUs support transactional memory ( TSX ). When introduced, in the mid-1990s, this method

6600-443: The same simplified segmentation as long mode. The x86 architecture is a variable instruction length, primarily " CISC " design with emphasis on backward compatibility . The instruction set is not typical CISC, however, but basically an extended version of the simple eight-bit 8008 and 8080 architectures. Byte-addressing is enabled and words are stored in memory with little-endian byte order. Memory access to unaligned addresses

6688-454: The stack. Much work has therefore been invested in making such accesses as fast as register accesses—i.e., a one cycle instruction throughput, in most circumstances where the accessed data is available in the top-level cache. A dedicated floating-point processor with 80-bit internal registers, the 8087 , was developed for the original 8086 . This microprocessor subsequently developed into the extended 80387 , and later processors incorporated

6776-644: The successor to the Merom core and Intel's 45 nm version of their mobile series of Pentium processors. The FSB frequency is increased from 667 MHz to 800 MHz, and the voltage is lowered. Intel released the first Penryn Core, the Pentium T4200, in December 2008. In June 2009, Intel released the first single-core processor to use the Pentium name, a Consumer Ultra-Low Voltage (CULV) Penryn core named Pentium SU2700. In September 2009, Intel introduced

6864-514: The term " Pentium-compatible " is often used to describe any x86 processor that supports the IA-32 instruction set and architecture. Even though they do not use the Pentium name, Intel also manufactures other processors based on the Pentium series for other markets. Most of these processors share the core design with one of the Pentium processor lines, usually differing in the amount of CPU cache , power efficiency or other features. The notable exception

6952-490: The x86 naming scheme now legally cleared, other x86 vendors had to choose different names for their x86-compatible products, and initially some chose to continue with variations of the numbering scheme: IBM partnered with Cyrix to produce the 5x86 and then the very efficient 6x86 (M1) and 6x86 MX ( MII ) lines of Cyrix designs, which were the first x86 microprocessors implementing register renaming to enable speculative execution . AMD meanwhile designed and manufactured

7040-484: The years, almost consistently with full backward compatibility . The architecture family has been implemented in processors from Intel, Cyrix , AMD , VIA Technologies and many other companies; there are also open implementations, such as the Zet SoC platform (currently inactive). Nevertheless, of those, only Intel, AMD, VIA Technologies, and DM&P Electronics hold x86 architectural licenses, and from these, only

7128-537: Was also affected by a few minor compatibility problems, the Nx586 lacked a floating-point unit (FPU) and (the then crucial) pin-compatibility, while the K5 had somewhat disappointing performance when it was (eventually) introduced. Customer ignorance of alternatives to the Pentium series further contributed to these designs being comparatively unsuccessful, despite the fact that the K5 had very good Pentium compatibility and

7216-505: Was anticipated to be succeeded by the 10 nanometer Cannon Lake , but it was announced in July 2015 that Cannon Lake had been delayed until the second half of 2017. In the meantime, Intel released a fourth 14 nm generation on October 5, 2017, named Coffee Lake . Cannon Lake would ultimately emerge in 2018, but only a single mobile CPU was released before it was discontinued the following year. As with previous Intel processors (such as

7304-404: Was chosen as it could connote a fundamental ingredient of a computer, like a chemical element , while the prefix pent- could refer to the fifth generation of x86. Due to its success, the Pentium brand would continue through several generations of high-end processors. In 2006, the name briefly disappeared from Intel's technology roadmaps , only to re-emerge in 2007. In 1998, Intel introduced

7392-403: Was originally referred to as the i386 architecture (like its first implementation) but Intel later dubbed it IA-32 when introducing its (unrelated) IA-64 architecture. In 1999–2003, AMD extended this 32-bit architecture to 64 bits and referred to it as x86-64 in early documents and later as AMD64 . Intel soon adopted AMD's architectural extensions under the name IA-32e, later using

7480-586: Was released in the Pentium line on May 22, 2011. Currently, there exist Ivy Bridge models G2010, G2020, G2120, G2030, and G2130. All are dual-core and have no hyper-threading or Turbo Boost. Several Haswell-based Pentium processors were released in 2013, among them the G3258 "Anniversary Edition", first released in 2014 by Intel to commemorate the 20th anniversary of the line. As with prior-generation Pentium processors, Haswell and Haswell Refresh-based parts have two cores only, lack support for hyper-threading, and use

7568-523: Was released that disabled the Windows Update check and allowed Windows 8.1 and earlier to continue to be updated on Skylake and later platforms. Support for every Kaby Lake processor and older was dropped by Windows 11 , excluding all Kaby Lake R, Skylake-X and Amber Lake processors as well as the Core i7-7820HQ and X series. Kaby Lake has a critical flaw where some short loops may cause unpredictable system behavior. The issue can be fixed if

7656-436: Was sometimes referred to as a "RISC core" or as "RISC translation", partly for marketing reasons, but also because these micro-operations share some properties with certain types of RISC instructions. However, traditional microcode (used since the 1950s) also inherently shares many of the same properties; the new method differs mainly in that the translation to micro-operations now occurs asynchronously. Not having to synchronize

7744-478: Was thereby described as an iAPX 86 system. There were also terms iRMX (for operating systems), iSBC (for single-board computers), and iSBX (for multimodule boards based on the 8086-architecture), all together under the heading Microsystem 80 . However, this naming scheme was quite temporary, lasting for a few years during the early 1980s. Although the 8086 was primarily developed for embedded systems and small multi-user or single-user computers, largely as

#37962