Zilog, Inc. is an American manufacturer of microprocessors , microcontrollers , and application-specific embedded system-on-chip (SoC) products .
88-647: The company was founded in 1974 by Federico Faggin and Ralph Ungermann , who were soon joined by Masatoshi Shima . All three had left Intel after working on the 4004 and 8080 microprocessors. The company's most famous product is the Z80 microprocessor, which played an important role in the evolution of early computing. Software-compatible with the Intel 8080, it offered a compelling alternative due to its lower cost and increased performance, propelling it to widespread adoption in video game systems and home computers during
176-653: A 16-bit destination. One of the reasons for the 8051's popularity is its range of operations on single bits. Bits are always specified by absolute addresses; there is no register-indirect or indexed addressing. Instructions that operate on single bits are: A bit operand is written in the form address.number . Because the carry flag is bit 7 of the bit-addressable program status word, the SETB C , CLR C and CPL C instructions are shorter equivalents to SETB PSW.7 , CLR PSW.7 and CPL PSW.7 . There are various high-level programming language compilers for
264-554: A control system using the 4004. He designed and built a 4004 tester using the 4004 as the controller of the tester, thus convincing Bob Noyce to renegotiate the exclusivity clause with Busicom that didn't allow Intel to sell the MCS-4 line to other customers. In 2009, the four contributors to the 4004 were inducted as Fellows of the Computer History Museum. Ted Hoff , head of Application Research Department, formulated
352-497: A different department without Hoff's and Mazor's involvement. Faggin had invented the original SGT at Fairchild Semiconductor in 1968 and provided additional refinements and inventions to make possible the implementation of the 4004 in a single chip. With routine help from Shima, Faggin completed the chip design in January 1971. The Intel 2102A is a redesign of the Intel 2102 static RAM, where Federico Faggin introduced to Intel, for
440-751: A few Atmel (now part of Microchip ) devices have single cycle cores . 8051 variants may include built-in reset timers with brown-out detection, on-chip oscillators, self-programmable flash ROM program memory, built-in external RAM, extra internal program storage, bootloader code in ROM, EEPROM non-volatile data storage, I C , SPI , and USB host interfaces, CAN or LIN bus, Zigbee or Bluetooth radio modules, PWM generators, analog comparators , analog-to-digital and digital-to-analog converters , RTCs , extra counters and timers, in-circuit debugging facilities, more interrupt sources, extra power saving modes, more/less parallel ports etc. Intel manufactured
528-521: A few kilobytes of XRAM on the chip. The first 256 bytes of XRAM may be accessed using the MOVX A , @ R0 , MOVX A , @ R1 , MOVX @ R0 , A , and MOVX @ R1 , A instructions. The full 64KB may be accessed using MOVX A , @ DPTR and MOVX @ DPTR , A . The 16-bit address requires the programmer to load the 16-bit index register. For this reason, RAM accesses with 16-bit addresses are substantially slower. Some CPUs permit
616-470: A full 256 bytes of IRAM. Direct accesses to the IRAM addresses 0x80–0xFF are, instead, mapped onto the special function registers (SFR), where the accumulators A, B, carry bit C, and other special registers for control, status, etc., are located. Special function registers (SFR) are located in the same address space as IRAM, at addresses 0x80 to 0xFF, and are accessed directly using the same instructions as for
704-400: A letter C in their name (e.g., 80C51) use complementary metal–oxide–semiconductor ( CMOS ) technology and consume less power than their NMOS predecessors. This made them more suitable for battery-powered devices. The family was continued in 1996 with the enhanced 8-bit MCS-151 and the 8/ 16-bit / 32-bit MCS-251 family of binary compatible microcontrollers. While Intel no longer manufactures
792-680: A mask-programmed version, 8052AH-BASIC, with a BASIC interpreter in ROM, capable of running user programs loaded into RAM. MCS-51-based microcontrollers have been adapted to extreme environments. Examples for high-temperature variants are the Tekmos TK8H51 family for −40 °C to +250 °C or the Honeywell HT83C51 for −55 °C to +225 °C (with operation for up to 1 year at +300 °C). Radiation-hardenend MCS-51 microcontrollers for use in spacecraft are available; e.g., from Cobham (formerly Aeroflex ) as
880-732: A quantity of extended data RAM (ERAM) located in the external data space. External RAM and ROM share the data and address buses. The original 8051 core ran at 12 clock cycles per machine cycle, with most instructions executing in one or two machine cycles. With a 12 MHz clock frequency , the 8051 could thus execute 1 million one-cycle instructions per second or 500,000 two-cycle instructions per second. Enhanced 8051 cores are now commonly used which run at six, four, two, or even one clock per machine cycle (denoted "1T"), and have clock frequencies of up to 100 MHz, and are thus capable of an even greater number of instructions per second. All Silicon Labs , some Dallas (now part of Maxim Integrated ) and
968-406: A register indirect access, using one of the standard 8-bit registers, and register indirect external RAM access utilizing the 16-bit indirect access register. The 8051's instruction set is designed as a Harvard architecture with segregated memory (data and instructions); it can only execute code fetched from program memory and has no instructions to write to program memory. However, the bus leaving
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#17327799678811056-532: A separate address space. It may be on- or off-chip, depending on the particular model of chip being used. Program memory is read-only, though some variants of the 8051 use on-chip flash memory and provide a method of re-programming the memory in-system or in-application. In addition to code, it is possible to store read-only data such as lookup tables in program memory, retrieved by the MOVC A , @ A + DPTR or MOVC A , @ A + PC instructions. The address
1144-536: A signed relative offset byte operand and transfers control there relative to the address of the following instruction. The AJMP / ACALL opcodes combine the three most significant bits of the opcode byte with the following byte to specify an 11-bit destination that is used to replace 11 bottom bits of the PC register (top 5 bits of PC register remain intact). For larger addresses, the LJMP and LCALL instructions allow
1232-577: A small core of other special function registers – including the interrupt enable IE at A8 and interrupt priority IP at B8; the I/O ports P0 (80), P1 (90), P2 (A0), P3 (B0); the serial I/O control SCON (98) and buffer SBUF (99); the CPU/power control register PCON (87); and the registers for timers 0 and 1 control (TCON at 88) and operation mode (TMOD at 89), the 16-bit timer 0 (TL0 at 8A, TH0 at 8C) and timer 1 (TL1 at 8B, TH1 at 8D) – are present on all versions of
1320-415: A theory of consciousness according to which consciousness is a purely quantum phenomenon , unique to each of us. This theory is supported by two quantum physics theorems: the no-cloning theorem and Holevo's theorem . The first states that a pure quantum state is not reproducible; the second limits the amount of measurable information to one classical bit for each qubit that describes the state. Therefore it
1408-511: A voice communication, call record keeping, etc. The patent covering the CoSystem is highly cited in the personal communication field. In 1986 Faggin co-founded and was CEO of Synaptics until 1999, becoming chairman from 1999 to 2009. Synaptics was initially dedicated to R&D in artificial neural networks for pattern-recognition applications using analog VLSI. Synaptics introduced the I1000,
1496-468: Is a major reason why these have replaced the MCS8051 in most applications. Each interrupt has four priorities. Within each priority, the interrupts of devices are in a fixed priority. Instructions are all 1 to 3 bytes long, consisting of an initial opcode byte, followed by up to 2 bytes of operands. 1 ⁄ 4 of the opcode bytes, x 0– x 3 , are used for irregular opcodes. 3 ⁄ 4 of
1584-464: Is a partial list of the 8051's registers, which are memory-mapped into the special function register space: 256 single bits are directly addressable. These are the 16 IRAM locations from 0x20–0x2F, and the 16 special function registers 0x80, 0x88, 0x90, ..., 0xF8. Any bit of these bytes may be directly accessed by a variety of logical operations and conditional branches. Note that the PSW does not contain
1672-568: Is an Italian-American physicist, engineer, inventor and entrepreneur. He is best known for designing the first commercial microprocessor , the Intel 4004 . He led the 4004 (MCS-4) project and the design group during the first five years of Intel 's microprocessor effort. Faggin also created, while working at Fairchild Semiconductor in 1968, the self-aligned MOS ( metal–oxide–semiconductor ) silicon-gate technology (SGT), which made possible MOS semiconductor memory chips , CCD image sensors , and
1760-492: Is based on the theoretical studies of Professor Giacomo D'Ariano 's studies, who derived quantum theory from informational principles [9] , and on the experiential, philosophical and scientific studies of Federico Faggin on the nature of consciousness. Source for the above-mentioned awards: Intel MCS-51 The Intel MCS-51 (commonly termed 8051 ) is a single chip microcontroller (MCU) series developed by Intel in 1980 for use in embedded systems . The architect of
1848-489: Is computed as the sum of the 8-bit accumulator and a 16-bit register (PC or DPTR). Special jump and call instructions ( AJMP and ACALL ) slightly reduce the size of code that accesses local (within the same 2 KB) program memory. When code larger than 64 KB is required, a common system makes the code bank-switched, with general-purpose I/O selecting the upper address bits. Some 8051 compilers make provisions to automatically access paged code. In these systems,
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#17327799678811936-420: Is determined by a two-bit address contained in the program status word. The 16 bytes (128 bits) at IRAM locations 0x20–0x2F contain space for 128 1-bit registers, which are separately addressable as bit registers 00–7F. The remaining bit registers, addressed as 80–FF, are mapped onto the 16 special function registers 80, 88, 90, 98, ..., F0 and F8 (those whose addresses are multiples of 8), and therefore include
2024-607: Is one of the most influential technologies to have fueled the progress of microelectronics since the MOSFET . Without the SGT, the first microprocessor could not have been made during 1970–1971. In February 1968, Federico Faggin joined Fairchild Semiconductor in Palo Alto where he was the project leader of the MOS silicon-gate technology, a MOSFET with a silicon self-aligned gate , and
2112-520: Is part of the instruction. Alternatively, IRAM can be accessed indirectly: the address is loaded into R0 or R1, and the memory is accessed using the @R0 or @R1 syntax, or as stack memory through the stack pointer SP, with the PUSH and POP operations; and *CALL and RET operations. The original 8051 has only 128 bytes of IRAM. The 8052 added IRAM from 0x80 to 0xFF, which can only be accessed indirectly (e.g. for use as stack space). Most 8051 clones also have
2200-419: Is possible to postulate that a quantum system that is in a pure state is aware of its state, since conscious experiences ( qualia ) have all the essential properties of pure states, i.e., it is private knowledge only minimally knowable from the outside. However, the mathematical representation of the experience (the pure state) does not describe the experience, which remains private and knowable only from within by
2288-495: The ADD , ADDC , and SUBB instructions set PSW flags. The INC , DEC , and logical instructions do not. The CJNE instruction modifies the C bit only, to the borrow that results from operand1 − operand2 . The irregular instructions comprise 64 opcodes, having more limited addressing modes, plus several opcodes scavenged from inapplicable modes in the regular instructions. The SJMP (short jump) opcode takes
2376-775: The ColecoVision game console (1982) and Sega 's Master System (1986) and Game Gear (1990). In the 1990s, the Z80 was the CPU of the Texas Instruments graphing calculator series, as well as being used as the secondary/support CPU in the Sega Genesis (most typically used for sound). After the Z80 Zilog introduced the 16-bit Z8000 and 32-bit Z80000 processors, but these were not particularly successful, and
2464-474: The Datapoint 2200 intelligent terminal, in which it was implemented in discrete IC logic. The Intel 4040 microprocessor (1974) was a much improved, machine-code-compatible version of the 4004 CPU allowing it to interface directly with standard memories and I/O devices. Federico Faggin created the architecture of the 4040 and supervised Tom Innes who did the design work. The 8080 microprocessor (1974)
2552-616: The Digital Equipment Corporation Rainbow 100 similarly added a Z80 to an Intel 8088-based MS-DOS computer to enable the machine to run both MS-DOS and CP/M software natively. The Z80 was a common choice for creators of video games during the Golden age of arcade video games , with a Z80 powering Pac-Man , dual Z80s in Scramble , and three in each Galaga machine. It was the central processor for
2640-575: The MSX architecture and the Microbee and Tandy TRS-80 (models I, II, III, 4, and others). The CP/M-80 operating system (and its huge software library featuring hits like WordStar and dBase ) was known to be the Z80 disk operating system, and its success is partly due to the popularity of the Z80. The 1985 Commodore 128 added a Z80 to the Commodore 64 hardware allowing it to run CP/M software;
2728-447: The MSX , ColecoVision , Master System and Game Boy . The Z80 ceased production in 2024. The Zilog Z8 micro controller (1978) was one of the first single-chip microcontrollers in the market. It integrated an 8-bit CPU, RAM, ROM and I/O facilities, sufficient for many control applications. Faggin conceived the Z8 in 1974, soon after he founded Zilog, but then decided to give priority to
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2816-586: The SPARCstation 20 . Zilog also formed a Systems Division, which designed the Zilog System 8000, a Z8000- or Z80000-based multiuser computer system running a Unix derivative called ZEUS (Zilog Enhanced UNIX System). Zilog attempted to enter the 32-bit microcontroller market in February 2006 with the demonstration of ARM9 -based Point-Of-Sale ( POS ) microcontroller product line. The final product
2904-529: The 4004 and 8080, joined Zilog in 1975. Ungermann did not want the company to become an Exxon subsidiary and left Zilog in 1978. On January 1, 1979, Zilog released the first issue of their comic book Captain Zilog , which featured the Z8000 computer. The Z8000, introduced that year, was the company's first 16-bit microprocessor. The company became a subsidiary of Exxon in 1980. Exxon initially acquired 51 percent of
2992-457: The 4004, was built with p-channel SGT. The 8008 development was originally assigned to Hal Feeney in March 1970 but was suspended until the 4004 was completed. It was resumed in January 1971 under Faggin's direction utilizing the basic circuits and methodology he had developed for the 4004, with Hal Feeney doing the chip design. The CPU architecture of the 8008 was originally created by CTC Inc. for
3080-399: The 8-bit indirect address to use any 8-bit general purpose register. To permit the use of this feature, some 8051-compatible microcontrollers with internal RAM larger than 256 bytes, or an inability to access external RAM, access internal RAM as if it were external, and have a special function register (e.g. PDATA) that permits them to set the upper address of the 256-byte page. This emulates
3168-419: The 8008. The high performance and low cost of the 8080 let developers use microprocessors for many new applications, including the forerunners of the personal computer. When Faggin left Intel at the end of 1974 to found Zilog with Ralph Ungermann, he was R&D department manager responsible for all MOS products, except for dynamic memories. The Zilog Z80 was the first microprocessor created by Zilog ,
3256-1034: The 8051 can switch register banks, avoiding the time-consuming task of transferring the critical registers to RAM. Once a UART, and a timer if necessary, has been configured, the programmer needs only write a simple interrupt routine to refill the send shift register whenever the last bit is shifted out by the UART and/or empty the full receive shift register (copy the data somewhere else). The main program then performs serial reads and writes simply by reading and writing 8-bit data to stacks. As of 2013 , new derivatives are still being developed by many major chipmakers, and major compiler suppliers such as IAR Systems , Keil and Altium Tasking continuously release updates. MCS-51 based microcontrollers typically include one or two UARTs , two or three timers, 128 or 256 bytes of internal data RAM (16 bytes of which are bit-addressable), up to 128 bytes of I/O , 512 bytes to 64 KB of internal program memory, and sometimes
3344-450: The 8051 core is the inclusion of a Boolean processing engine, which allows bit -level Boolean logic operations to be carried out directly and efficiently on select internal registers , ports and select RAM locations. Another feature is the inclusion of four bank selectable working register sets, which greatly reduce the time required to perform the context switches to enter and leave interrupt service routines . With one instruction,
3432-415: The 8051. Other addresses are version-dependent; in particular, the timer 2 registers for the 8052, the control register T2CON (at C8), the 16-bit capture/latch (RCAP2L at CA, RCAP2H at CB) and timer 2 (TL2 at CC and TH2 at CD) are not included with the 8051. The 32 bytes in IRAM from 0x00–0x1F contain space for four 8-byte register windows , which the eight registers R0–R7 map to. The currently active window
3520-537: The 8051. Several C compilers are available for the 8051, most of which allow the programmer to specify where each variable should be stored in its six types of memory, and provide access to 8051-specific hardware features such as the multiple register banks and bit manipulation instructions. There are many commercial C compilers. Small Device C Compiler (SDCC) is a popular open-source C compiler. Other high level languages such as C++ , Forth , BASIC , Object Pascal , Pascal , PL/M and Modula-2 are available for
3608-571: The 8080, yet it retained software compatibility with it. Much faster and with more than twice as many registers and instructions of the 8080, it was part of a family of components that included several intelligent peripherals (the Z80-PIO, a programmable parallel input-output controller; the Z80-CTC, a programmable counter-timer; the Z80-SIO, programmable serial communications interface controller, and
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3696-540: The 8080. Alongside the 6502 , the Z80 was one of the most popular 8-bit processors for general purpose microcomputers and other applications from the late 1970s well into the 1980s, and while modern CMOS versions of the 6502 are still in production and use today, the Z80 was discontinued in 2024. The Z80 CPU was used in the Sinclair ZX80 , ZX81 , ZX Spectrum and the Amstrad CPC home computers as well as
3784-746: The Faggin Foundation helped to establish a $ 1 million endowment for the Faggin Family Presidential Chair in the Physics of Information at UC Santa Cruz to promote the study of "fundamental questions at the interface of physics and related fields including mathematics, complex systems, biophysics, and cognitive science, with the unifying theme of information in physics." Born in Vicenza, Italy, Federico grew up in an intellectual environment. His father, Giuseppe Faggin,
3872-505: The IC has a single address and data path, and strongly resembles a Von Neumann architecture bus. Most 8051 systems respect the instruction set, and require customized features to download new executable programs, e.g. in flash memory. Internal RAM (IRAM) has an 8-bit address space, using addresses 0 through 0xFF. IRAM from 0x00 to 0x7F contains 128 directly addressable 1-byte registers, which can be accessed using an 8-bit absolute address that
3960-538: The Intel MCS-51 instruction set was John H. Wharton . Intel's original versions were popular in the 1980s and early 1990s, and enhanced binary compatible derivatives remain popular today. It is a complex instruction set computer with separate memory spaces for program instructions and data. Intel's original MCS-51 family was developed using N-type metal–oxide–semiconductor ( NMOS ) technology, like its predecessor Intel MCS-48 , but later versions, identified by
4048-431: The MCS-4 family of microprocessors, which included the 4004, the world's first single-chip microprocessor. Fairchild was not taking advantage of the SGT and Faggin wanted to use his new technology to design advanced chips. The 4004 (1971) was made possible by the advanced capabilities of the silicon gate technology (SGT) being enhanced through the novel random logic chip design methodology that Faggin created at Intel. It
4136-738: The MCS-51, MCS-151 and MCS-251 family, enhanced binary compatible derivatives made by numerous vendors remain popular today. Some derivatives integrate a digital signal processor (DSP) or a floating-point unit (coprocessor, FPU). Beyond these physical devices, several companies also offer MCS-51 derivatives as IP cores for use in field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC) designs. The 8051 architecture provides many functions ( central processing unit (CPU), random-access memory (RAM), read-only memory (ROM), input/output (I/O) ports, serial port, interrupt control, timers ) in one package : One feature of
4224-486: The MCS8051 mode that can page the upper byte of a RAM address by setting the general-purpose I/O pins. When RAM larger than 64 KB is required, a common system makes the RAM bank-switched, with general-purpose I/O selecting the upper address bits. Some 8051 compilers make provisions to automatically access paged data. The only register on an 8051 that is not memory-mapped is the 16-bit program counter (PC). This specifies
4312-1119: The UT69RH051 or from NIIET as the 1830VE32 ( Russian : 1830ВЕ32 ). In some engineering schools, the 8051 microcontroller is used in introductory microcontroller courses. Intel's first MCS-51 microcontroller was the 8051, with 4 KB ROM and 128 byte RAM. Variants starting with 87 have a user-programmable EPROM, sometimes UV erasable. Variants with a C as the third character are some kind of CMOS . 8031 and 8032 are ROM-less versions, with 128 and 256 bytes RAM. The last digit can indicate memory size, e.g. 8052 with 8 KB ROM, 87C54 16 KB EPROM, and 87C58 with 32 KB EPROM, all with 256 byte RAM. The MCS-51 has four distinct types of memory: internal RAM, special function registers, program memory, and external data memory. To access these efficiently, some compilers utilize as many as 7 types of memory definitions: Internal RAM, single-bit access to internal RAM, special function registers, single-bit access to selected (divisible by 8) special function registers, program RAM, external RAM accessed using
4400-531: The Z80-DMA, programmable direct memory access controller). This chip family allowed the design of powerful and low-cost microcomputers with performance comparable to minicomputers. The Z80-CPU had a substantially better bus structure and interrupt structure than the 8080 and could interface directly with dynamic RAM, since it included an internal memory-refresh controller. The Z80 was used in many of early personal computers , as well as in video game systems such as
4488-477: The Z80. The Z8 was designed in 1976–78 and ended production in 2024. The Communication CoSystem (1984). The Cosystem was conceived by Faggin and designed and produced by Cygnet Technologies, Inc., the second startup company of Faggin. Attached to a personal computer and to a standard phone line, the CoSystem could automatically handle all the personal voice and data communications of the user, including electronic mail, database access, computer screen transfers during
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#17327799678814576-467: The academic year 1965–1966. In 1967, he joined SGS-Fairchild , in Italy, where he developed its first MOS metal-gate process technology and designed its first two commercial MOS integrated circuits. SGS sent him to California in 1968. When Fairchild sold SGS-Fairchild, Faggin accepted an offer to complete the development of the silicon-gate technology with Fairchild. The silicon-gate technology (SGT)
4664-412: The address of the next instruction to execute. Relative branch instructions supply an 8-bit signed offset which is added to the PC. Eight general-purpose registers R0–R7 may be accessed with instructions one byte shorter than others. They are mapped to IRAM between 0x00 and 0x1F. Only eight bytes of that range are used at any given time, determined by the two bank-select bits in the PSW. The following
4752-413: The architectural proposal and the instruction set with assistance from Stan Mazor and working in conjunction with Busicom's Masatoshi Shima . However, none of them was a chip designer and none was familiar with the new Silicon Gate Technology (SGT). The silicon design was the essential missing ingredient to making a microprocessor since everything else was already known. Federico Faggin led the project in
4840-607: The best sensors of the competition, while using approximately half the chip size of competing devices. Faggin also oversaw the successful acquisition of Foveon by the Japanese Sigma Corporation in November 2008. Founded in 2011 the "Federico and Elvia Faggin Foundation" supports the scientific study of consciousness at US universities and research institutes. The purpose of the Foundation is to advance
4928-419: The bits comprising the accumulators A, B and program status word PSW. The register window address, being bits 3 and 4 of the PSW, is itself addressable as bit registers D3 and D4, respectively; while the carry bit C (or CY), at bit 7 of the PSW, is addressable as bit register D7. Program memory (PMEM, though less common in usage than IRAM and XRAM) is up to 64 KB of read-only memory, starting at address 0 in
5016-418: The chip level. In August 2017, Zilog and its parent IXYS Corporation were acquired by Littelfuse Inc in exchange for $ 750 million in cash and stocks. The Z80(i) is an improved implementation of the Intel 8080 architecture, with substantial extensions to the register model and instruction set and with added hardware interface features. At introduction, the Z80 was faster, more capable, and much cheaper than
5104-530: The co-founder and CEO of Cygnet Technologies, and then Synaptics . In 2010, he received the 2009 National Medal of Technology and Innovation , the highest honor the United States confers for achievements related to technological progress. In 2011, Faggin founded the Federico and Elvia Faggin Foundation to support the scientific study of consciousness at US universities and research institutes. In 2015,
5192-420: The common negative (N) , or zero (Z) flags . For the former, the most significant bit of the accumulator can be addressed directly, as it is a bit-addressable SFR. For the latter, there are explicit instructions to jump on whether or not the accumulator is zero. There is also a two-operand compare and jump operation. The parity (P) bit is often used to implement serial modes that include parity. To support this,
5280-465: The company before buying it outright; however, the management and employees bought it back in 1989, led by Edgar Sack . Zilog went public in 1991, but was acquired in 1998 by Texas Pacific Group for $ 527 million. Curtis Crawford replaced Sack and changed the company's direction towards 32-bit data communications processors. In 1999, Zilog acquired Production Languages Corporation for an unspecified amount less than $ 10 million. Bonds were sold against
5368-657: The company developed the Z8 Encore! 8-bit Flash MCU and ZNEO 16-bit Flash MCU product families. In February 2007, Zilog hired Darin Billerbeck to replace Jim Thorburn as president and CEO. The last year Zilog introduced any new 8-bit microcontroller products was 2007. With no new product road map, FY2008 sales fell 20% to $ 67.2 million. Sales fell 46% in FY2009 to $ 36.2 million. In January 2008, Zilog declined an unsolicited proposal made by Universal Electronics Inc. to acquire
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#17327799678815456-521: The company for $ 62.4 million in cash, which was significantly below the market valuation of Zilog's stock at the time. Details of the acquisition have been under investigation. Since early 2010, Zilog has refocused on the industrial and consumer markets for motion detection, motor control, RF wireless and embedded security applications, and is currently producing a number of reference designs that integrate its 8- and 16-bit microcontrollers with IXYS power management products. In February 2012, Zilog announced
5544-476: The company refocused on the microcontroller market, producing both basic CPUs and application-specific integrated circuits/standard products (ASICs/ASSPs) built around a CPU core. As well as producing processors, Zilog has produced several other components. One of the most famous was the Zilog SCC serial communications controller as found on early Apple Macintosh , Sun SPARCstations and SPARCservers up to
5632-513: The company to fund the new developments, but after the Internet bubble burst in 2000 and the resultant reduction in customer demand for such products, Curtis Crawford was replaced by James (Jim) Thorburn, who reorganized the company under Chapter 11 bankruptcy in late 2001 and refocused it on the 8- and 16-bit microcontroller market. Jim Thorburn led Zilog back into profitability, and by FY 2007, Zilog had $ 82 million in sales. During this time,
5720-680: The company. On February 19, 2009, Zilog announced that it had sold off its 8-bit Crimzon Universal Remote Control infrared microcontroller product line, as well as its ARM9 32-bit microcontrollers, including the Zatara security microcontrollers and 15 patents, to Maxim Integrated Products. Remote control manufacturer Universal Electronics Inc. purchased all of Zilog's software and intellectual property assets related to Zilog's universal remote control business, including all ROM code, software, and database of infrared codes. Zilog sold these assets for $ 31 million cash. In December 2009, IXYS Corporation bought
5808-451: The family (constituting the MCS-4 family) were: the 4001, a 2k-bit metal-mask programmable ROM with programmable input-output lines; the 4002, a 320-bit dynamic RAM with a 4-bit output port; and the 4003, a 10-bit serial input and serial/parallel output, static shift register to use as an I/O expander. Faggin promoted the idea of broadly marketing the MCS-4 to customers other than Busicom by showing to Intel management how customers could design
5896-454: The first company entirely dedicated to microprocessors. It was started by Federico Faggin and Ralph Ungermann in November 1974. Faggin was Zilog's president and CEO until the end of 1980 and he conceived and designed the Z80 CPU and its family of programmable peripheral components. He also co-designed the CPU whose project leader was Masatoshi Shima . The Z80-CPU was a major improvement over
5984-434: The first time, the depletion load, combining the silicon gate technology with ionic implantation. The design was done toward the end of 1973 by Federico Faggin and Dick Pashley. The 2102A was 5 times faster than the 2102, opening a new direction for Intel. Faggin's silicon design methodology was used for implementing all Intel's early microprocessors. The Intel 8008 was the world's first single-chip 8-bit CPU and, like
6072-445: The general product idea and led a group of engineers who further refined the idea through many brainstorming sessions. Faggin is a co-inventor of ten patents assigned to Synaptics. He is chairman emeritus of Synaptics. During his tenure as president and CEO of Foveon , from 2003 to 2008, Faggin revitalized the company and provided a new technological and business direction resulting in image sensors superior in all critical parameters to
6160-558: The implementation of a small digital transistor computer with 4 K × 12 bit of magnetic memory (1960). The Olivetti R&D department subsequently developed one of the world's first programmable desktop electronic calculators, the Olivetti Programma 101 (1964). After this first work experience, Faggin studied physics at the University of Padua and taught the electronics laboratory course for 3rd year physics students in
6248-431: The interrupt vectors and paging table are placed in the first 32K of code and are always resident. External data memory (XRAM) is a third address space, also starting at address 0, and allowing 16 bits of address space. It can also be on- or off-chip; what makes it "external" is that it must be accessed using the MOVX (move external) instruction. Many variants of the 8051 include the standard 256 bytes of IRAM plus
6336-446: The inventor of its unique process architecture. The SGT became the basis of all modern NMOS and CMOS integrated circuits . It made possible the creation of MOS semiconductor memory chips during 1969–1970, the first microprocessor during 1970–1971, and the first CCD and EPROM (electrically programmable read-only memory ) with floating silicon gates (1970–1971). The SGT replaced the incumbent aluminum-gate MOS technology, and
6424-554: The late 1970s and early 1980s. The name, pronounced with a long "i" ( / ˈ z aɪ l ɒ ɡ / ), is an acronym of Z integrated logic , also thought of as "Z for the last word of Integrated Logic". Zilog was started in California in 1974 by Federico Faggin and Ralph Ungermann with support and encouragement from Exxon 's computing division. Both left Intel after working on the 4004 and 8080 microprocessors and custom chips. Masatoshi Shima , who also worked with Faggin on
6512-424: The lower half of IRAM. They cannot be accessed indirectly via @R0 or @R1 or by the stack pointer SP; indirect access to those addresses will access the second half of IRAM, instead. The special function registers (SFR) include the accumulators A (or ACC, at E0) and B (at F0) and program status word (or PSW, at D0), themselves, as well as the 16-bit data pointer DPTR (at 82, as DPL and 83 as DPH). In addition to these,
6600-464: The microprocessor. After the 4004, he led development of the Intel 8008 and 8080 , using his SGT methodology for random logic chip design, which was essential to the creation of early Intel microprocessors . He was co-founder (with Ralph Ungermann ) and CEO of Zilog , the first company solely dedicated to microprocessors, and led the development of the Zilog Z80 and Z8 processors. He was later
6688-451: The opcode bytes, x 4– x F , are assigned to 16 basic ALU instructions with 12 possible operands. The least significant nibble of the opcode selects the primary operand as follows: The most significant nibble specifies the operation as follows. Not all support all addressing modes; the immediate mode in particular is unavailable when the primary operand is written to. Instruction mnemonics use destination , source operand order. Only
6776-408: The release of its Z8051 family of microcontrollers and tool sets to fill a vacancy in the developer market for 8051 cores that was created when chip-maker NXP Semiconductors exited the 8051 market. Later that year, Zilog announced its ZGATE Embedded Security solution, which incorporates its eZ80F91 MCU and TCP/IP stack with an embedded firewall to offer protection against cyber threats and attacks at
6864-440: The speed 5 times, while reducing the chip area by half compared with metal-gate MOS. The design methodology created by Faggin was utilized for the implementation of all Intel's early microprocessors and later also for Zilog's Z80 . The Intel 4004 – a 4-bit CPU (central processing unit) on a single chip – was a member of a family of 4 custom chips designed for Busicom , a Japanese calculator manufacturer. The other members of
6952-503: The standard MCS51 UARTs could send 9 bits. The microarchitecture of the Intel MCS8051 is proprietary, but published features suggest how it works. It is a multi-cycle processor . The MCS8051 used 12 clock cycles for most instructions. Many instructions utilize an accumulator. In contrast, most compatible computers execute instructions in one to three cycles, except for the multiply and divide instructions. The much higher speed
7040-435: The system that is in that state. No classical machine can ever be conscious given that classical information is reproducible (program and data can be copied perfectly), while the quantum state is private. Consciousness is therefore not linked to the functioning of the body and can continue to exist even after the death of the body. The body behaves like a drone controlled "top down" by consciousness. The new D'Ariano-Faggin theory
7128-452: The understanding of consciousness through theoretical and experimental research. Faggin's interest in consciousness has his roots in the study of artificial neural networks at Synaptics, a company he started in 1986, that prompted his inquiry into whether or not it is possible to build a conscious computer. In the book Italian : "Irriducibile. La coscienza, la vita, i computer e la nostra natura" (Mondadori, 2022) Federico Faggin proposed
7216-406: The world's first single-chip optical character recognizer in 1991. In 1994, Synaptics introduced the touchpad to replace the cumbersome trackball then in use in laptop computers. The touchpad was broadly adopted by the industry. Synaptics also introduced the early touchscreens that were eventually adopted for intelligent phones and tablets; applications that now dominate the market. Faggin came up with
7304-483: Was 5 times faster, had 100 times less junction leakage and was much more reliable than the 3705, demonstrating the superiority of SGT over metal-gate MOS. See also: Faggin, F., Klein T. (1969). "A Faster Generation of MOS Devices With Low Threshold Is Riding The Crest of the New Wave, Silicon-Gate IC's". Electronics, 29 Sep. 1969. Federico Faggin joined Intel from Fairchild in 1970 as the project leader and designer of
7392-571: Was a scholar who wrote many academic books and translated, with commentaries, the Enneads of Plotinus from the original Greek into modern Italian. Federico had a strong interest in technology from an early age. He attended a technical high school in Vicenza, I.T.I.S. Alessandro Rossi, and later earned a laurea degree in physics , summa cum laude , from the University of Padua . Faggin joined Olivetti aged 19. There he co-designed and led
7480-502: Was adopted worldwide within 10 years, eventually making obsolete the original integrated circuits built with bipolar transistors . At Fairchild, Faggin designed the first commercial integrated circuit using silicon-gate technology with self-aligned MOSFET transistors: the Fairchild 3708. The 3708 was an 8-bit analog multiplexer with decoding logic, replacing the equivalent Fairchild 3705 that used metal-gate technology. The 3708
7568-690: Was released in 2007 called Zatara. Sales were disappointing and the entire ARM9 series was sold to Maxim Integrated Products in 2009. Zilog also produced Zdots single board computers. It includes Zilog eZ80AcclaimPlus controller, 1MB flash memory, 512KB SRAM, 10BaseT Ethernet Controller, IrDA transceiver, 2 x 60-pin system expansion interface with full MPU bus/control signals, RJ-45 Ethernet connector. Motion detection version includes Z8 Encore! XP MCU. Federico Faggin Federico Faggin ( Italian pronunciation: [fedeˈriːko fadˈdʒin] , Venetian: [faˈdʒiŋ] ; born 1 December 1941)
7656-403: Was the first high-performance 8-bit microprocessor in the market, using the faster n-channel SGT. The 8080 was conceived and architected by Faggin, and designed by Masatoshi Shima under Faggin's supervision. The 8080 was a major improvement over the 8008 architecture, yet it retained software compatibility with it. It was much faster and easier to interface to external memory and I/O devices than
7744-466: Was this new methodology, together with his several design innovations, that allowed him to fit the microprocessor in one small chip. A single-chip microprocessor – an idea that was expected to occur many years in the future – became possible in 1971 by using SGT with two additional innovations: (1) "buried contacts" that doubled the circuit density, and (2) the use of bootstrap loads with 2-phase clocks—previously considered impossible with SGT— that improved
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