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38-495: The group developed the Digital Visual Interface (DVI) standard in 1999. In 2011, founding member HP reported that the group had not met in 5 years. This computing article is a stub . You can help Misplaced Pages by expanding it . This standards - or measurement -related article is a stub . You can help Misplaced Pages by expanding it . Digital Visual Interface Digital Visual Interface ( DVI )

76-478: A gross bit rate that is 10 times the frequency of the TMDS clock. In each TMDS clock period there is a 10-bit symbol per TMDS data pair representing 8-bits of pixel color. In single link mode each set of three 10-bit symbols represents one 24-bit pixel, while in dual link mode each set of six 10-bit symbols either represents two 24-bit pixels or one pixel of up to 48-bit color depth . The specification document allows

114-514: A twisted pair for noise reduction, rather than coaxial cable that is conventional for carrying video signals. Like LVDS, the data is transmitted serially over the data link. When transmitting video data and used in HDMI, three TMDS twisted pairs are used to transfer video data. Each of the three links corresponds to a different RGB component. The physical layer for TMDS is current mode logic (CML), DC coupled and terminated to 3.3 Volts. While

152-575: A 35-pin MicroCross connector similar to EVC; the analog audio and video input lines from EVC were repurposed to carry digital video for P&D. Because P&D was a physically large, expensive connector, a consortium of companies developed the DFP standard (1999), which was focused solely on digital video transmission using a 20-pin micro ribbon connector and omitted the analog video and data capabilities of P&D. DVI instead chose to strip just

190-417: A DVI-D source because HDMI and DVI-D both define an overlapping minimum set of supported resolutions and frame buffer formats. Some DVI-D sources use non-standard extensions to output HDMI signals including audio (e.g. ATI 3000-series and NVIDIA GTX 200-series ). Some multimedia displays use a DVI to HDMI adapter to input the HDMI signal with audio. Exact capabilities vary by video card specifications. In

228-448: A large frequency range. One benefit of DVI over other interfaces is that it is relatively straightforward to transform the signal from the digital domain into the analog domain using a video DAC , as both clock and synchronization signals are transmitted. Fixed frequency interfaces, like DisplayPort , need to reconstruct the clock from the transmitted data. The DVI specification includes signaling for reducing power consumption. Similar to

266-449: A male DVI-I to a female DVI-D. It is possible, however, to join a male DVI-D connector with a female DVI-I connector. DVI is the only widespread video standard that includes analog and digital transmission in the same connector. Competing standards are exclusively digital: these include a system using low-voltage differential signaling ( LVDS ), known by its proprietary names FPD-Link (flat-panel display) and FLATLINK; and its successors,

304-659: A preferred mode or native resolution . Each mode is a set of timing values that define the duration and frequency of the horizontal/vertical sync, the positioning of the active display area, the horizontal resolution, vertical resolution, and refresh rate. The maximum length recommended for DVI cables is not included in the specification, since it is dependent on the TMDS clock frequency. In general, cable lengths up to 4.5 metres (15 ft) will work for display resolutions up to 1920 × 1200. Longer cables up to 15 metres (49 ft) in length can be used with display resolutions 1280 × 1024 or lower. For greater distances,

342-418: A receiver can fully differentiate between active and control regions. When DVI was designed, most computer monitors were still of the cathode-ray tube type that require analog video synchronization signals. The timing of the digital synchronization signals matches the equivalent analog ones, so the process of transforming DVI to and from an analog signal does not require extra (high-speed) memory, expensive at

380-485: A single transmitter with a TMDS clock up to 165 MHz that supports resolutions up to 1920 × 1200 at 60 Hz. Dual link DVI adds six pins, at the center of the connector, for a second transmitter increasing the bandwidth and supporting resolutions up to 2560 × 1600 at 60 Hz. A connector with these additional pins is sometimes referred to as DVI-DL (dual link). Dual link should not be confused with dual display (also known as dual head ), which

418-422: A video source with DVI-I through the use of a passive adapter. Since the analog pins are directly compatible with VGA signaling, passive adapters are simple and cheap to produce, providing a cost-effective solution to support VGA on DVI. The long flat pin on a DVI-I connector is wider than the same pin on a DVI-D connector, so even if the four analog pins were manually removed, it still wouldn't be possible to connect

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456-487: Is a VESA standard which can easily be calculated with the Linux gtf utility. Coordinated Video Timings -Reduced Blanking (CVT-RB) is a VESA standard which offers reduced horizontal and vertical blanking for non-CRT based displays. One of the purposes of DVI stream encoding is to provide a DC-balanced output that reduces decoding errors. This goal is achieved by using 10-bit symbols for 8-bit or less characters and using

494-544: Is a video display interface developed by the Digital Display Working Group (DDWG). The digital interface is used to connect a video source, such as a video display controller , to a display device , such as a computer monitor . It was developed with the intention of creating an industry standard for the transfer of uncompressed digital video content. DVI devices manufactured as DVI-I have support for analog connections, and are compatible with

532-427: Is a configuration consisting of a single computer connected to two monitors, sometimes using a DMS-59 connector for two single link DVI connections. In addition to digital, some DVI connectors also have pins that pass an analog signal, which can be used to connect an analog monitor. The analog pins are the four that surround the flat blade on a DVI-I or DVI-A connector. A VGA monitor, for example, can be connected to

570-417: Is a newer digital audio/video interface developed and promoted by the consumer electronics industry . DVI and HDMI have the same electrical specifications for their TMDS and VESA/DDC twisted pairs. However HDMI and DVI differ in several key ways. To promote interoperability between DVI-D and HDMI devices, HDMI source components and displays support DVI-D signaling. For example, an HDMI display can be driven by

608-447: Is encoded using 8b/10b encoding . DVI does not use packetization , but rather transmits the pixel data as if it were a rasterized analog video signal. As such, the complete frame is drawn during each vertical refresh period. The full active area of each frame is always transmitted without compression. Video modes typically use horizontal and vertical refresh timings that are compatible with cathode-ray tube (CRT) displays, though this

646-498: Is not a requirement. In single link mode, the maximum TMDS clock frequency is 165 MHz, which supports a maximum resolution of 2.75  megapixels (including blanking interval ) at 60 Hz refresh. For practical purposes, this allows a maximum 16:10 screen resolution of 1920 × 1200 at 60 Hz. To support higher-resolution display devices, the DVI specification contains a provision for dual link . Dual link DVI doubles

684-417: Is to keep compatibility with the previous VGA cables and connectors . VGA pins for HSync, Vsync and three video channels are available in both DVI-I or DVI-A (but not DVI-D) connectors and are electrically compatible, while pins for DDC (clock and data) and 5 V power and ground are kept in all DVI connectors. Thus, a passive adapter can interface between DVI-I or DVI-A (but not DVI-D) and VGA connectors. HDMI

722-424: Is transported using multiple TMDS twisted pairs . At the electrical level, these pairs are highly resistant to electrical noise and other forms of analog distortion . A single link DVI connection has four TMDS pairs. Three data pairs carry their designated 8-bit RGB component (red, green, or blue) of the video signal for a total of 24 bits per pixel . The fourth pair carries the TMDS clock. The binary data

760-616: The LVDS Display Interface (LDI) and OpenLDI . Some DVD players , HDTV sets, and video projectors have DVI connectors that transmit an encrypted signal for copy protection using the High-bandwidth Digital Content Protection (HDCP) protocol. Computers can be connected to HDTV sets over DVI, but the graphics card must support HDCP to play content protected by digital rights management (DRM). Generalized Timing Formula (GTF)

798-511: The 1,024 possible combinations of the 10 transmitted bits: Control data is encoded using the values in the table below. Control data characters are designed to have a large number (7) of transitions to help the receiver synchronize its clock with the transmitter clock. On Channel 0 the C0 and C1 bits encode the Horizontal synchronization (HSync) and Vertical synchronization (VSync) signals. On

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836-553: The DVI connector includes pins for the display data channel (DDC), which allows the graphics adapter to read the monitor's extended display identification data (EDID). When a source and display using the DDC2 revision are connected, the source first queries the display's capabilities by reading the monitor EDID block over an I²C link. The EDID block contains the display's identification, color characteristics (such as gamma value), and table of supported video modes. The table can designate

874-577: The analog VESA display power management signaling (DPMS) standard, a connected device can turn a monitor off when the connected device is powered down, or programmatically if the display controller of the device supports it. Devices with this capability can also attain Energy Star certification. The analog section of the DVI specification document is brief and points to other specifications like VESA VSIS for electrical characteristics and GTFS for timing information. The motivation for including analog

912-484: The analog VGA interface by including VGA pins, while DVI-D devices are digital-only. This compatibility, along with other advantages, led to its widespread acceptance over competing digital display standards Plug and Display (P&D) and Digital Flat Panel (DFP). Although DVI is predominantly associated with computers, it is sometimes used in other consumer electronics such as television sets and DVD players . An earlier attempt to promulgate an updated standard to

950-639: The analog VGA connector was made by the Video Electronics Standards Association (VESA) in 1994 and 1995, with the Enhanced Video Connector (EVC), which was intended to consolidate cables between the computer and monitor. EVC used a 35-pin Molex MicroCross connector and carried analog video (input and output), analog stereo audio (input and output), and data (via USB and FireWire ). At

988-648: The best connectivity options moving forward. In our opinion, DisplayPort 1.2 is the future interface for PC monitors, along with HDMI 1.4a for TV connectivity". Transition Minimized Differential Signaling Transition-minimized differential signaling ( TMDS ) is a technology for transmitting high-speed serial data used by the DVI and HDMI video interfaces, as well as by other digital communication interfaces. The transmitter incorporates an advanced coding algorithm which reduces electromagnetic interference over copper cables and enables robust clock recovery at

1026-511: The data and the clock to not be aligned. However, as the ratio between the TMDS clock and gross bit rate per TMDS pair is fixed at 1:10, the unknown alignment is kept over time. The receiver must recover the bits on the stream using any of the techniques of clock/data recovery to find the correct symbol boundary. The DVI specification allows the TMDS clock to vary between 25 MHz and 165 MHz. This 1:6.6 ratio can make clock recovery difficult, as phase-locked loops , if used, need to work over

1064-468: The data functions from P&D, using a 29-pin MicroCross connector to carry digital and analog video. Critically, DVI allows dual-link TMDS signals, meaning it supports higher resolutions than the single-link P&D and DFP connectors, which led to its successful adoption as an industry standard. Compatibility of DVI with P&D and DFP is accomplished typically through passive adapters that provide appropriate physical interfaces, as all three standards use

1102-468: The extra bits for the DC balancing. Like other ways of transmitting video, there are two different regions: the active region, where pixel data is sent, and the control region, where synchronization signals are sent. The active region is encoded using transition-minimized differential signaling , where the control region is encoded with a fixed 8b/10b encoding . As the two schemes yield different 10-bit symbols,

1140-553: The number of TMDS data pairs, effectively doubling the video bandwidth, which allows higher resolutions up to 2560 × 1600 at 60 Hz or higher refresh rates for lower resolutions. For backward compatibility with displays using analog VGA signals, some of the contacts in the DVI connector carry the analog VGA signals. To ensure a basic level of interoperability, DVI compliant devices are required to support one baseline display mode , "low pixel format" (640 × 480 at 60 Hz). Like modern analog VGA connectors ,

1178-670: The other channels they encode the CTL0 through CTL3 signals which are unused by DVI but in the case of HDMI are used as a preamble indicating the type of data about to be transferred (Video Data or Data Island), the HDCP status and so on. TMDS was developed by Silicon Image Inc. as a member of the Digital Display Working Group . TMDS is similar to low-voltage differential signaling (LVDS) in that it uses differential signaling to reduce electromagnetic interference (EMI) which allows faster signal transfers with increased accuracy. TMDS also uses

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1216-534: The previous bit. The encoder chooses between XOR and XNOR by determining which will result in the fewest transitions; the ninth bit encodes which operation was used. In the second stage, the first eight bits are optionally inverted to even out the balance of ones and zeros and therefore the sustained average DC level; the tenth bit encodes whether this inversion took place. The 10-bit TMDS symbol can represent either an 8-bit data value during normal data transmission, or 2 bits of control signals during screen blanking. Of

1254-441: The receiver to achieve high skew tolerance for driving longer cables as well as shorter low-cost cables. The method is a form of 8b/10b encoding but using a code-set that differs from the original IBM form. A two-stage process converts an input of 8 bits into a 10 bit code with particular desirable properties. In the first stage, the first bit is untransformed and each subsequent bit is either XOR or XNOR transformed against

1292-820: The reverse scenario, a DVI display that lacks optional support for HDCP might be unable to display protected content even though it is otherwise compatible with the HDMI source. Features specific to HDMI such as remote control, audio transport, xvYCC and deep color are not usable in devices that support only DVI signals. HDCP compatibility between source and destination devices is subject to manufacturer specifications for each device. In December 2010, Intel , AMD , and several computer and display manufacturers announced they would stop supporting DVI-I, VGA and LVDS -technologies from 2013/2015, and instead speed up adoption of DisplayPort and HDMI. They also stated: "Legacy interfaces such as VGA, DVI and LVDS have not kept pace, and newer standards such as DisplayPort and HDMI clearly provide

1330-460: The same DDC/EDID handshaking protocols and TMDS digital video signals. DVI made its way into products starting in 1999. One of the first DVI monitors was Apple's original Cinema Display , which launched in 1999. DVI's digital video transmission format is based on panelLink , a serial format developed by Silicon Image that utilizes a high-speed serial link called transition minimized differential signaling (TMDS). Digital video pixel data

1368-551: The same time, with the increasing availability of digital flat-panel displays, the priority shifted to digital video transmission, which would remove the extra analog/digital conversion steps required for VGA and EVC; the EVC connector was reused by VESA, which released the Plug & Display (P&D) standard in 1997. P&D offered single-link TMDS digital video with, as an option, analog video output and data (USB and FireWire), using

1406-461: The time. HDCP is an extra layer that transforms the 10-bit symbols before transmitting. Only after correct authorization can the receiver undo the HDCP encryption. Control regions are not encrypted in order to let the receiver know when the active region starts. DVI provide one TMDS clock pair and 3 TMDS data pairs in single link mode or 6 TMDS data pairs in dual link mode. TMDS data pairs operate at

1444-409: The use of a DVI booster—a signal repeater which may use an external power supply—is recommended to help mitigate signal degradation. The DVI connector on a device is given one of three names, depending on which signals it implements: Most DVI connector types—the exception is DVI-A—have pins that pass digital video signals. These come in two varieties: single link and dual link. Single link DVI employs

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