IMLAC Corporation was an American electronics company in Needham, Massachusetts , that manufactured graphical display systems, mainly the PDS-1 and PDS-4 , in the late 1960s and 1970s.
95-397: The PDS-1 debuted in late 1969 at that year's Fall Joint Computer Conference . It was the first low-cost commercial realization of a highly interactive computer graphics display with motion. The PDS-1's initial selling price was $ 9450 for single units, and down to $ 6545 per unit in larger quantities. The PDS-1 was functionally similar to the much bigger IBM 2250 , which cost 30 times more. It
190-569: A wire wrap backplane connecting all cards. There was no uniform backplane bus. Customer documentation included complete schematics down to the gate level, so that customers could design their own interface boards. It was possible to see, touch, and understand every detail of how the whole system worked. Cycle time for the core memory was 2.0 microseconds for the PDS-1, and 1.8 microseconds for PDS-1D. TTL logic ran 10x faster, with 10 timing pulses per core memory cycle. The basic PDS-1 did not include
285-489: A 6400 CPU, if an add instruction immediately followed a multiply instruction, the add instruction could not be started until the multiply instruction finished, so the net execution time of the two instructions would be the sum of their individual execution times. The 6600 CPU had multiple functional units which could operate simultaneously, i.e. , "in parallel ", allowing the CPU to overlap instructions' execution times. For example,
380-402: A 6600 CPU could begin executing an add instruction in the next CPU cycle following the beginning of a multiply instruction (assuming, of course, that the result of the multiply instruction was not an operand of the add instruction), so the net execution time of the two instructions would simply be the (longer) execution time of the multiply instruction. The 6600 CPU also had an instruction stack ,
475-686: A PDS-1 system; the user could make hyperlinks with a light pen and create them simply with a couple of keystrokes. Multi-window editing on FRESS was also possible when using the PDS-1. PDS-1 systems were used to design Arpanet's network graphics protocol. The first overlapping multi-windowing system, the DNLS or Display NLS , was first fully implemented on the PDS-1 in early 1973 by SRI (non-overlapping windows implemented 1971). The DNLS implemented "Display Areas", or DAs, which could be dynamically moved, resized, and overlapped. In contrast to later windowing systems, these DAs could only store text strings. The DNLS
570-485: A block of land and started up a new laboratory. Although this process introduced a fairly lengthy delay in the design of his new machine, once in the new laboratory, without management interference, things started to progress quickly. By this time, the new transistors were becoming quite reliable, and modules built with them tended to work properly on the first try. The 6600 began to take form, with Cray working alongside Jim Thornton , system architect and "hidden genius" of
665-467: A communication path in a multi-mainframe complex. To handle the "housekeeping" tasks, which in other designs were assigned to the CPU, Cray included ten other processors, based partly on his earlier computer, the CDC 160-A. These machines, called Peripheral Processors, or PPs, were full computers in their own right, but were tuned to performing I/O tasks and running the operating system. (Substantial parts of
760-488: A computer conference is a stub . You can help Misplaced Pages by expanding it . CDC 6600 The CDC 6600 was the flagship of the 6000 series of mainframe computer systems manufactured by Control Data Corporation . Generally considered to be the first successful supercomputer , it outperformed the industry's prior recordholder, the IBM 7030 Stretch , by a factor of three. With performance of up to three megaFLOPS ,
855-428: A connector (30 pins, two vertical rows of 15) on one edge, and six test points on the opposite edge. The module was placed between two aluminum cold plates to remove heat. The module consisted of two parallel printed circuit boards, with components mounted either on one of the boards or between the two boards. This provided a very dense package; generally impossible to repair, but with good heat transfer characteristics. It
950-455: A conventional instruction set, the PPs have several instructions specifically intended to communicate with the central processor. The central processor has 60-bit words, while the peripheral processors have 12-bit words. CDC used the term "byte" to refer to 12-bit entities used by peripheral processors; characters are 6-bit, and central processor instructions are either 15 bits, or 30 bits with
1045-504: A goal of ten times the performance of the 6600, delivered as the CDC 7600 . The later CDC Cyber 70 and 170 computers were very similar to the CDC 6600 in overall design and were nearly completely backwards compatible. The 6600 was three times faster than the previous record-holder, the IBM 7030 Stretch ; this alarmed IBM . Then-CEO Thomas Watson Jr. wrote a memo to his employees on August 28, 1963: "Last week, Control Data ... announced
SECTION 10
#17327972357281140-474: A kind of instruction cache , which helped increase CPU throughput by reducing the amount of CPU idle time caused by waiting for memory to respond to instruction fetch requests. The two kinds of CPUs were instruction compatible, so that a program that ran on either of the kinds of CPUs would run the same way on the other kind but would run faster on the 6600 CPU. Indeed, all models of the 6000 series were fully inter-compatible. The CDC 6400 had one CPU (a 6400 CPU),
1235-414: A large CPU, introducing signalling delays while information flowed between the individual modules making it up. These delays set a maximum upper limit on performance, as the machine could only operate at a cycle speed that allowed the signals time to arrive at the next module. Cray took another approach. In the 1960s, CPUs generally ran slower than the main memory to which they were attached. For instance,
1330-558: A larger computer. Hofstadter composed his book Gödel, Escher, Bach on an Imlac editor. But most graphics applications required strong floating point support, compilers, and a file system. Those applications ran mostly on an expensive timeshared computer, which sent digested image data to the Imlac, which ran a small assembler program emulating a generic graphics terminal. A typical use was rendering architectural drawings and animated walkthroughs that had been previously drawn offline. PDS-1 use
1425-725: A metallic stencil mask with an A-shaped hole, or through a B-shaped hole, etc. But on the PDS-1, all letter shapes, sizes, and spacing were entirely controlled in software. Each desired form of the letter E had its own display subroutine which executed a sequence of short vector strokes for that letter. Each occurrence of a letter on the screen was a display processor call to that letter's subroutine. This scheme handled arbitrary fonts, extended character sets, and even cursive right-to-left languages like Arabic. The smaller, fastest-drawing fonts were ugly, with diamond-shaped approximations of rounded loops. The display subroutine scheme also handled electronic design symbols. The PDS-1 monitor face
1520-399: A new machine that would be 50 times faster than the 1604. When asked to complete a detailed report on plans at one and five years into the future, he wrote back that his five-year goal was "to produce the largest computer in the world", "largest" at that time being synonymous with "fastest", and that his one-year plan was "to be one-fifth of the way". Taking his core team to new offices near
1615-427: A processor might take 15 cycles to multiply two numbers, while each memory access took only one or two cycles. This meant there was a significant time where the main memory was idle. It was this idle time that the 6600 exploited. The CDC 6600 used a simplified central processor (CP) that was designed to run mathematical and logic operations as rapidly as possible, which demanded it be built as small as possible to reduce
1710-463: A request in a known location ( Reference Address + 1) monitored by PP0. If necessary, PP0 would assign another PP to load any necessary code and to handle the request. The PP would then clear RA+1 to inform the CP program that the task was complete. The unique role of PP0 in controlling the machine was a potential single point of failure, in that a malfunction here could shut down the whole machine, even if
1805-401: A rudimentary disk OS supporting program overlays. The disks were dropped from later products. The PDS-1 electronics were built from 7400 series low-density TTL integrated circuits , with only a dozen logic gates or 4 register bits per DIP chip. Small printed circuit cards held up to 12 chips each. The shallow desk pedestal held three racks or rows of cards, with 25 cards per row, and
1900-658: A series of computer conferences in the United States held under various names between 1951 and 1987. The conferences were the venue for presentations and papers representing "cumulative work in the [computer] field." Originally a semi-annual pair, the Western Joint Computer Conference ( WJCC ) was held annually in the western United States, and a counterpart, the Eastern Joint Computer Conference ( EJCC ),
1995-497: A signed 18-bit address field, the latter allowing for a directly addressable memory space of 128K words of central memory (converted to modern terms, with 8-bit bytes, this just under 1 MB). The signed nature of the address registers limits an individual program to 128K words. (Later CDC 6000-compatible machines could have 256K or more words of central memory, budget permitting, but individual user programs were still limited to 128K words of CM.) Central processor instructions start on
SECTION 20
#17327972357282090-473: A three-address machine, allows for the specification of all three operands. The CDC 6000 series included four basic models, the CDC 6400 , the CDC 6500 , the CDC 6600, and the CDC 6700. The models of the 6000 series differed only in their CPUs, which were of two kinds, the 6400 CPU and the 6600 CPU. The 6400 CPU had a unified arithmetic unit, rather than discrete functional units . As such, it could not overlap instructions' execution times. For example, in
2185-495: A value in a register. In the 6600, loading the value from memory would require one instruction, and adding it would require a second one. While slower in theory due to the additional memory accesses, the fact that in well-scheduled code, multiple instructions could be processing in parallel offloaded this expense. This simplification also forced programmers to be very aware of their memory accesses, and therefore code deliberately to reduce them as much as possible. The CDC 6600 CP, being
2280-474: A word boundary when they are the target of a jump statement or subroutine return jump instruction, so no-op instructions are sometimes required to fill out the last 15, 30 or 45 bits of a word. Experienced assembler programmers could fine-tune their programs by filling these no-op spaces with misc instructions that would be needed later in the program. The 6-bit characters , in an encoding called CDC display code , could be used to store up to 10 characters in
2375-461: A word. They permitted a character set of 64 characters, which is enough for all upper case letters, digits, and some punctuation. It was certainly enough to write FORTRAN, or print financial or scientific reports. There were actually two variations of the CDC display code character sets in use — 64-character and 63-character. The 64-character set had the disadvantage that the ":" (colon) character would be ignored (interpreted as zero fill) if it were
2470-528: Is controlled by the operating system and neither controls nor displays the hardware directly. The entire 6600 machine contained approximately 400,000 transistors. The CPU could only execute a limited number of simple instructions. A typical CPU of the era had a complex instruction set , which included instructions to handle all the normal "housekeeping" tasks, such as memory access and input/output . Cray instead implemented these instructions in separate, simpler processors dedicated solely to these tasks, leaving
2565-635: Is on display at the Computer History Museum in Mountain View, California . The only running CDC 6000 series machine has been restored by Living Computers: Museum + Labs . CDC's first products were based on the machines designed at Engineering Research Associates (ERA), which Seymour Cray had been asked to update after moving to CDC. After an experimental machine known as the Little Character , in 1960 they delivered
2660-476: The Arden Hills, Minnesota assembly plant. MACE ([Greg] Mansfield And [Dave] Cahlander Executive) was written largely by a single programmer in the off-hours when machines were available. Its feature set was essentially the same as COS and SCOPE 1. It retained the earlier COS file system, but made significant advances in code modularity to improve system reliability and adaptiveness to new storage devices. MACE
2755-511: The Barrel and slot . This meant that the execution units (the "slot") would execute one instruction cycle from the first PP, then one instruction cycle from the second PP, etc. in a round robin fashion. This was done both to reduce costs, and because access to CP memory required 10 PP clock cycles: when a PP accesses CP memory, the data is available next time the PP receives its slot time. In addition to
2850-399: The CDC 1604 , one of the first commercial transistor-based computers , and one of the fastest machines on the market. Management was delighted, and made plans for a new series of machines that were more tailored to business use; they would include instructions for character handling and record keeping for instance. Cray was not interested in such a project and set himself the goal of producing
2945-501: The "plus" was filled with cables that interconnected the chassis. The chassis were numbered from 1 (containing all 10 PPUs and their memories, as well as the 12 rather minimal I/O channels) to 16. The main memory for the CPU was spread over many of the chassis. In a system with only 64K words of main memory, one of the arms of the "plus" was omitted. The logic of the machine was packaged into modules about 2.5 in (64 mm) square and about 1 in (2.5 cm) thick. Each module had
IMLAC - Misplaced Pages Continue
3040-576: The 10 PP states (similar to modern multithreading processors). The PP register barrel would "rotate", with each PP register set presented to the "slot" which the actual PP CPU occupied. The shared CPU would execute all or some portion of a PP's instruction whereupon the barrel would "rotate" again, presenting the next PP's register set (state). Multiple "rotations" of the barrel were needed to complete an instruction. A complete barrel "rotation" occurred in 1000 nanoseconds (100 nanoseconds per PP), and an instruction could take from one to five "rotations" of
3135-400: The 6600 system. I understand that in the laboratory developing the system there are only 34 people including the janitor. Of these, 14 are engineers and 4 are programmers ... Contrasting this modest effort with our vast development activities, I fail to understand why we have lost our industry leadership position by letting someone else offer the world's most powerful computer." Cray's reply
3230-424: The 6600. More than 100 CDC 6600s were sold over the machine's lifetime (1964 to 1969). Many of these went to various nuclear weapon -related laboratories, and quite a few found their way into university computing laboratories. A CDC 6600 was used to disprove Euler's sum of powers conjecture in an early example of direct numerical search. Cray immediately turned his attention to its replacement, this time setting
3325-442: The CDC 6500 had two CPUs (both 6400 CPUs), the CDC 6600 had one CPU (a 6600 CPU), and the CDC 6700 had two CPUs (one 6600 CPU and one 6400 CPU). The Central Processor (CP) and main memory of the 6400, 6500, and 6600 machines had a 60-bit word length. The Central Processor had eight general purpose 60-bit registers X0 through X7, eight 18-bit address registers A0 through A7, and eight 18-bit "increment" registers B0 through B7. B0
3420-541: The CDC 6600 (and kin) stand virtually alone in being able to execute a 60-bit floating point multiplication in time comparable to that for a program branch. A recent analysis by Mitch Alsup of James Thornton's book, "Design of a Computer", revealed that the 6600's Floating Point unit is a 2 stage pipelined design. Fixed point addition and subtraction of 60-bit numbers were handled in the Long Add Unit, using ones' complement for negative numbers. Fixed point multiply
3515-577: The CDC 6600 was the world's fastest computer from 1964 to 1969, when it relinquished that status to its successor, the CDC 7600. The first CDC 6600s were delivered in 1965 to Livermore and Los Alamos . They quickly became a must-have system in high-end scientific and mathematical computing, with systems being delivered to Courant Institute of Mathematical Sciences , CERN , the Lawrence Radiation Laboratory , and many others. At least 100 were delivered in total. A CDC 6600
3610-424: The CDC 7600 introduced pipelining into its functional units.) In the best case, an instruction could be issued to a functional unit every 100 ns clock cycle. The system read and decoded instructions from memory as fast as possible, generally faster than they could be completed, and fed them off to the units for processing. The units were: Floating-point operations were given pride of place in this architecture :
3705-417: The CP. The PPs were designed to access memory during the times when the CPU was busy performing operations. This allowed them to perform input/output essentially for free in terms of central processing time, keeping the CPU busy as much as possible. The 6600's CP used a 60-bit word and a ones' complement representation of integers, something that later CDC machines would use into the late 1980s, making them
3800-411: The CPU with a much smaller instruction set. This was the first of what later came to be called reduced instruction set computer (RISC) design. By allowing the CPU, peripheral processors (PPs) and I/O to operate in parallel, the design considerably improved the performance of the machine. Under normal conditions a machine with several processors would also cost a great deal more. Key to the 6600's design
3895-487: The PDS-1 was available. IMLAC is not an acronym, but is the name of a poet-philosopher from Samuel Johnson 's novel, The History of Rasselas, Prince of Abissinia . The DEC GT40 had a similar design and price point to the PDS-1D. Its desktop electronics were more compact and used a mass-produced PDP 11/05 board set as its local minicomputer. This automatically gave it a much bigger set of programming tools, but it too
IMLAC - Misplaced Pages Continue
3990-635: The SCOPE architecture, so CDC simply renamed it NOS/BE (Batch Environment), and were able to claim that everyone was thus running NOS. In practice, it was far easier to modify the Kronos code base to add SCOPE features than the reverse. The assembly plant environment also produced other operating systems which were never intended for customer use. These included the engineering tools SMM for hardware testing, and KALEIDOSCOPE, for software smoke testing . Another commonly used tool for CDC Field Engineers during testing
4085-470: The barrel to be completed, or more if it was a data transfer instruction. The basis for the 6600 CPU is what would later be called a RISC system, one in which the processor is tuned to do instructions that are comparatively simple and have limited and well-defined access to memory. The philosophy of many other machines was toward using instructions which were complicated — for example, a single instruction which would fetch an operand from memory and add it to
4180-483: The beam then needed more than 1/40th of a second to retrace everything. The competing lower cost Tektronix 4010 graphics terminal used an alternative storage tube CRT technology which required no continual refresh and hence no local computer display memory at all. The glowing image was remembered by the CRT phosphor itself. But like an Etch A Sketch , the accumulated image could be modified or moved only by flash-erasing
4275-464: The best case. The 6600 CP included ten parallel functional units, allowing multiple instructions to be worked on at the same time. Today, this is known as a superscalar processor design, but it was unique for its time. Unlike most modern CPU designs, functional units were not pipelined; the functional unit would become busy when an instruction was "issued" to it and would remain busy for the entire time required to execute that instruction. (By contrast,
4370-487: The bit level. Due to the large word size, and with 10 characters per word, it was often faster to process a word's worth of characters at a time, rather than unpacking/processing/repacking them. For example, the CDC COBOL compiler was actually quite good at processing decimal fields using this technique. These sorts of techniques are now commonly used in the "multi-media" instructions of current processors. The machine
4465-413: The clock being faster, the simple processor executed instructions in fewer clock cycles; for instance, the CPU could complete a multiplication in ten cycles. Supporting the CPU were ten 12-bit 4 KiB peripheral processors (PPs), each with access to a common pool of 12 input/output (I/O) channels , that handled input and output, as well as controlling what data were sent into central memory for processing by
4560-399: The display processor could go wild and potentially burn the monitor phosphor or deflection amplifiers. The PDS-1 and PDS-4 were bought in small numbers by R&D organizations and many universities. They developed pioneering computer applications and trained the next generation of graphics system designers. The FRESS hypertext system had enhanced capability and usability if accessed from
4655-563: The early Arpanet . The density, capacity, and price of computer memory have improved steadily and exponentially for decades, an engineering trend called Moore's Law . The limitations of refreshed or storage vector displays were accepted only in the era when those displays were much cheaper than raster-scan alternatives. Raster graphic displays inevitably took over when the price of 128 kilobytes no longer mattered. Imlac PDS-1's at Xerox PARC impressed them with its interactivity and graphics. But its ugly text prompted Chuck Thacker to develop
4750-462: The entire screen and then slowing redrawing everything with data resent from some large computer. This was much less interactive than the PDS-1 and could not show animations. On other displays of this era, text fonts were hardwired and could not be changed. For example, the operator consoles of the CDC 6600 formed each letter all at once by sending the Charactron CRT electron beam through
4845-756: The entire screen in a fixed horizontal pattern (like in TV sets), regardless of which dots are turned on. Bitmap raster graphics require much more memory than vector graphics. XGA -level 1024x768 black/white resolution requires 96 kilobytes of video refresh memory, 12 times more than a basic PDS-1. In 1970, that much core memory cost about $ 8000. (It now costs only 0.05 cents of shared DRAM .) Vector displays were good for showing data charts, modifying line drawings and CAD diagrams, tumbling 3-D wire-frame shapes, editing text, laying out printed pages, and playing simple games. But they did not handle colors, images, filled-in areas, black-on-white screens, or WYSIWYG fidelity to
SECTION 50
#17327972357284940-591: The experimental bitmapped Xerox Alto machine in 1973, a decade before that much memory was affordable for non-research single-user machines. The Alto led to the GUI revolution. The PDS-1 and similar vector terminals were supplanted in the 1980s by (non-programmable) raster graphics terminals such as the AED767. And by easily programmed personal workstations with raster graphics such as the Terak 8510/a UCSD Pascal machine and
5035-467: The first seven CDC 6000 series machines could be configured with an optional Extended Core Storage (ECS) system. ECS was built from a different variety of core memory than was used in the central memory. This memory was slower, but cheap enough that it could be much larger. The primary reason was that ECS memory was wired with only two wires per core (contrast with five for central memory). Because it performed very wide transfers, its sequential transfer rate
5130-454: The fonts of professionally printed text. The PDS-1 screen was repeatedly refreshed or redrawn 40 times per second to avoid visible flickering. But irregular beam motion was slower than the steady motions on raster displays. The beam deflections were driven by magnetic coils , and those coils fought against rapid changes to their current. The screen flickered when filled with more than 800 inches of lines or more than 1200 characters, because
5225-1028: The form of delivery delay penalties. After several months of waiting with the machines ready to be shipped, the project was eventually cancelled. The programmers who had worked on COS had little faith in SIPROS and had continued working on improving COS. Operating system development then split into two camps. The CDC-sanctioned evolution of COS was undertaken at the Sunnyvale, California software development laboratory. Many customers eventually took delivery of their systems with this software, then known as SCOPE (Supervisory Control Of Program Execution). SCOPE version 1 was, essentially, dis-assembled COS; SCOPE version 2 included new device and file system support; SCOPE version 3 included permanent file support, EI/200 remote batch support, and INTERCOM time-sharing support. SCOPE always had significant reliability and maintainability issues. The underground evolution of COS took place at
5320-628: The high performance PERQ Unix system. And those were supplanted by microprocessor -based mass-market Macintoshes , Windows PCs, and video game consoles . And now by single chips inside smartphones . In 2013, an Imlac emulator named sImlac was written. An update version of this emulator can be obtained from the GitHub repository of the Seattle-based Living Computers: Museum + Labs . Fall Joint Computer Conference The Joint Computer Conferences were
5415-611: The last character in a word. A complementary variant, called 6/12 display code , was also used in the Kronos and NOS timesharing systems to allow full use of the ASCII character set in a manner somewhat compatible with older software. With no byte addressing instructions at all, code had to be written to pack and shift characters into words. The very large words, and comparatively small amount of memory, meant that programmers would frequently economize on memory by packing data into words at
5510-406: The last systems besides some digital signal processors to use this architecture. Later, CDC offered options as to the number and type of CPs, PPs and channels, e.g., the CDC 6700 had two central processors, a 6400 CP and a 6600 CP. While other machines of its day had elaborate front panels to control them, the 6600 has only a dead start panel . There is a dual CRT system console, but it
5605-424: The length of wiring and the associated signalling delays. This led to the machine's (typically) cross-shaped main chassis with the circuit boards for the CPU arranged close to the center, and resulted in a much smaller CPU. Combined with the faster switching speeds of the silicon transistors, the new CPU ran at 10 MHz (100 ns cycle time), about ten times faster than other machines on the market. In addition to
5700-517: The machines were intended to be delivered with a much more powerful system known as SIPROS (for Simultaneous Processing Operating System), which was being developed at the company's System Sciences Division in Los Angeles . Customers were impressed with SIPROS' feature list, and many had SIPROS written into their delivery contracts. SIPROS turned out to be a major fiasco. Development timelines continued to slip, costing CDC major amounts of profit in
5795-470: The new CDC 3600 started to near production quality, and appeared to be exactly what management wanted, when they wanted it. Cray eventually told CDC's CEO, William Norris that something had to change, or he would leave the company. Norris felt he was too important to lose, and gave Cray the green light to set up a new laboratory wherever he wanted. After a short search, Cray decided to return to his home town of Chippewa Falls, Wisconsin , where he purchased
SECTION 60
#17327972357285890-410: The nine other PPs and the CPU were still functioning properly. Cray fixed this in the design of the successor 7600, when any of the PPs could be the controller, and the CPU could reassign any one to this role. Each PP included its own memory of 4096 12-bit words. This memory served for both for I/O buffering and program storage, but the execution units were shared by ten PPs, in a configuration called
5985-417: The operating system may create a core dump which records the contents of the program's memory and registers in a file, allowing the developer of the program a means to know what happened. Note the distinction with virtual memory systems; in this case, the entirety of a process's addressable space must be in core memory, must be contiguous, and its size cannot be larger than the real memory capacity. All but
6080-585: The operating system ran on the PP's; thus leaving most of the power of the Central Processor available for user programs.) Only the PPs had access to the I/O channels . One of the PPs (PP0) was in overall control of the machine, including control of the program running on the main CPU, while the others would be dedicated to various I/O tasks; PP9 was dedicated to the system console. When the CP program needed to perform an operating system function, it would put
6175-423: The optional hardware cards for long vectors. Instead, the minicomputer created a long sequence of short-stroke display instructions. The software used a quick Bresenham method to compute intermediate points for sloped lines without doing multiplies or divides. The long vector hardware similarly needed only an add/subtract circuit. If a long vector program was mistakenly run on a basic machine without that option,
6270-459: The original CDC headquarters, they started to experiment with higher quality versions of the "cheap" transistors Cray had used in the 1604. After much experimentation, they found that there was simply no way the germanium -based transistors could be run much faster than those used in the 1604. The "business machine" that management had originally wanted, now forming as the CDC 3000 series , pushed them about as far as they could go. Cray then decided
6365-413: The pen-on-paper motions of a pen plotter . The beam skipped blank areas of the screen. Things could be drawn in arbitrary order. Vector displays are a now-obsolete alternative to raster scan displays. In vector displays, the CRT electron beam 'draws' only the lines and curves displayed. In raster scan displays, the image is a grid of pixel spots (a 'bitmapped' image), and the CRT beam repeatedly sweeps
6460-517: The popular arcade game Frogger , was created on a PDS-1 as part of a psychology experiment in 1971. Mazewar , the first online multiplayer computer game , was created on a pair of PDS-1's. Later, up to 8 players ran on PDS-1 stations or other terminals networked to the MIT host PDP-10 computer running the Mazewar AI program. Mazewar games between MIT and Stanford were a major data load on
6555-486: The program may be anywhere in the physical memory. Using this technique, each user program can be moved ("relocated") in main memory by the operating system, as long as the RA register reflects its position in memory. A user program which attempts to access memory outside the allowed range (that is, with an address which is not less than FL) will trigger an interrupt, and will be terminated by the operating system. When this happens,
6650-503: The same memory. Instructions for the display processor consisted of 1-byte short-stroke instructions for letters and curves, and 6-byte long vector instructions, and 2-byte unconditional jumps. The display processor had no conventional ALU instructions and never modified memory. Jumps supported subroutine calls for repeated objects like letters and symbols. Jumps also supported arranging displayed objects into linked lists for quick editing. XY positions were in integer form only. There
6745-410: The solution was to work with the then-new silicon -based transistors from Fairchild Semiconductor , which were just coming onto the market and offered dramatically improved switching performance. During this period, CDC grew from a startup to a large company and Cray became increasingly frustrated with what he saw as ridiculous management requirements. Things became considerably more tense in 1962 when
6840-561: The two conferences into a single annual National Computer Conference ( NCC ) which ran until discontinued in 1987. The 1967 FJCC in Anaheim, California attracted 15,000 attendees. In 1968 in San Francisco, California Douglas Engelbart presented " The Mother of All Demos " presenting such then-new technologies as the computer mouse , video conferencing , teleconferencing , and hypertext . Source: This article about
6935-402: The user program. When a user program tries to read or write a word in central memory at address a , the processor will first verify that a is between 0 and FL-1. If it is, the processor accesses the word in central memory at address RA+a. This process is known as base-bound relocation; each user program sees core memory as a contiguous block words with length FL, starting with address 0; in fact
7030-399: The word at that address into X1 through X5 respectively; setting A6 or A7 stored a word from X6 or X7. No side effects were associated with A0. A separate hardware load/store unit, called the stunt box , handled the actual data movement independently of the operation of the instruction stream, allowing other operations to complete while memory was being accessed, which required eight cycles, in
7125-412: Was a significant step forward towards computer workstations and modern displays. The PDS-1 consisted of a CRT monitor , keyboard, light pen , and a control panel on a small desk with most electronic logic in the desk pedestal. The electronics included a simple 16-bit minicomputer , 8-16 kilobytes of magnetic-core memory , and a display processor for driving CRT beam movements. By 1971 a mouse for
7220-454: Was about 3 MFLOPS . Using the best available compilers, late in the machine's history, FORTRAN programs could expect to maintain about 0.5 MFLOPS. User programs are restricted to use only a contiguous area of main memory. The portion of memory to which an executing program has access is controlled by the RA (Relative Address) and FL (Field Length) registers which are not accessible to
7315-405: Was built in a plus-sign-shaped cabinet with a pump and heat exchanger in the outermost 18 in (46 cm) of each of the four arms. Cooling was done with Freon circulating within the machine and exchanging heat to an external chilled water supply. Each arm could hold four chassis, each about 8 in (20 cm) thick, hinged near the center, and opening a bit like a book. The intersection of
7410-528: Was done as a special case in the floating-point multiply unit—if the exponent was zero, the FP unit would do a single-precision 48-bit floating-point multiply and clear the high exponent part, resulting in a 48-bit integer result. Integer divide was performed by a macro, converting to and from floating point. Previously executed instructions were saved in an eight-word cache , called the "stack". In-stack jumps were quicker than out-of-stack jumps because no memory fetch
7505-476: Was easy and did not involve much computing. To minimize costs, Imlac designed their own simple minicomputer with as few registers and logic gates as possible. It was a single- accumulator machine much like a DEC PDP-8 , except using 16-bit instructions and data instead of 12 bits. There were no integer multiply/divide instructions, no floating point instructions, no microprogramming , no virtual addressing , and no cache . The single form of address modification
7600-439: Was generated on the fly, by programs running on the local minicomputer or on a large remote computer. The PDS-1's built-in minicomputer was needed for responding to user keyboard and light pen interactions quickly, without delays in talking to a remote timeshared large computer for help. The minicomputer's main task was to build and modify the display list as needed for the next refresh cycle. For text and 2-D line graphics this
7695-959: Was held annually in the eastern US. Both conferences were sponsored by an organization known as the National Joint Computer Committee (NJCC), composed of the Association for Computing Machinery (ACM), the American Institute of Electrical Engineers (AIEE) Committee on Computing Devices, and the Institute of Radio Engineers (IRE) Professional Group on Electronic Computers. In 1962 the American Federation of Information Processing Societies (AFIPS) took over sponsorship and renamed them Fall Joint Computer Conference ( FJCC ) and Spring Joint Computer Conference ( SJCC ). In 1973 AFIPS merged
7790-411: Was held at zero permanently by the hardware. Many programmers found it useful to set B1 to 1, and similarly treat it as inviolate. The CP had no instructions for input and output, which are accomplished through Peripheral Processors (below). No opcodes were specifically dedicated to loading or storing memory; this occurred as a side effect of assignment to certain A registers. Setting A1 through A5 loaded
7885-422: Was held back for several years by not having a standard program library supporting animation or interactive drawing and dragging of objects. But at night time, students were willing to write large amounts of assembler code just for fun. The PDS-1 applications most remembered today are the early interactive games . The two-player Spacewar! was ported from a PDP-1 demo. Freeway Crossing , an early predecessor of
7980-400: Was known as cordwood construction . There was a sore point with the 6600 operating system support — slipping timelines. The machines originally ran a very simple job-control system known as COS ( Chippewa Operating System ), which was quickly "thrown together" based on the earlier CDC 3000 operating system in order to have something running to test the systems for delivery. However
8075-589: Was never an official product, although many customers were able to wrangle a copy from CDC. The unofficial MACE software was later chosen over the official SCOPE product as the basis of the next CDC operating system, Kronos , named after the Greek god of time . The story goes that Dave Mansfield called the University of Minnesota library and asked for an ancient word meaning "time". He wrote down "Kronos" instead of "Chronos". The main marketing reason for its adoption
8170-442: Was no support for rotations or arbitrary scaling on the fly. If a symbol crossed over an edge of the screen, the beam wrapped around to the other side rather than being clipped, making a smear. So higher levels of the application had to do the clipping test, using separate data structures. (This was fixed in later models.) Programming the letter font subroutines was via assembler language . Code for line drawings and overall layout
8265-492: Was rectangular and was available in portrait or landscape orientation. The 1K x 1K grid of points was stretched 33% in the longer direction to allow text and graphics to fill the screen. All graphics programs then had to account for the non-square pixels. If the system was to be used mainly for graphics, the monitor could be installed with an unstretched grid leaving ends of the screen permanently unused. The PDS-1's display processor and its minicomputer ran simultaneously, out of
8360-412: Was required. The stack was flushed by an unconditional jump instruction, so unconditional jumps at the ends of loops were conventionally written as conditional jumps that would always succeed. The system used a 10 MHz clock, with a four-phase signal . A floating-point multiplication took ten cycles, a division took 29, and the overall performance, taking into account memory delays and other issues,
8455-526: Was sardonic: "It seems like Mr. Watson has answered his own question." Typical machines of the 1950s and 1960s used a single central processing unit (CPU) to drive the entire system. A typical program would first load data into memory (often using pre-rolled library code), process it, and then write it back out. This required the CPUs to be fairly complex in order to handle the complete set of instructions they would be called on to perform. A complex CPU implied
8550-513: Was the development of its TELEX time-sharing feature and its BATCHIO remote batch feature. Kronos continued to use the COS/SCOPE 1 file system with the addition of a permanent file feature. An attempt to unify the SCOPE and Kronos operating system products produced NOS , (Network Operating System). NOS was intended to be the sole operating system for all CDC machines, a fact CDC promoted heavily. Many SCOPE customers remained software-dependent on
8645-579: Was the same as that of the small core memory. A 6000 CPU could directly perform block memory transfers between a user's program (or operating system) and the ECS unit. Wide data paths were used, so this was a very fast operation. Memory bounds were maintained in a similar manner as central memory, with an RA/FL mechanism maintained by the operating system. ECS could be used for a variety of purposes, including containing user data arrays that were too large for central memory, holding often-used files, swapping, and even as
8740-467: Was to make the I/O processors, known as peripheral processors (PPs), as simple as possible. The PPs were based on the simple 12-bit CDC 160-A , which ran much slower than the CPU, gathering up data and transmitting it as bursts into main memory at high speed via dedicated hardware. The 10 PPs were implemented virtually; there was CPU hardware only for a single PP. This CPU hardware was shared and operated on 10 PP register sets which represented each of
8835-697: Was used on several PDS-1s at several ARPANET locations, and was the main inspiration for the Xerox Alto 's overlapping window system. Imlac display systems were bundled into various larger commercial products involving visual design and specialized software. Imlac sold a newspaper layout and typesetting system using PDS-1 called CES. MCS's Anvil mechanical CAD system used later Imlac workstations to interactively design mechanical parts, which were then milled out automatically from metal stock. Some simple applications such as text editors were entirely coded in Imlac assembler and could run without much involvement with
8930-413: Was usually driven by applications running on larger PDP systems. The monitor was a 14-inch monochrome vector display , continually refreshed from local memory. Its normal resolution was 1024 by 1024 addressable points, and 2K x 2K in small-font scaling mode. The CRT electron beam moved freely in X and Y position and angle under program control to draw individual sloped lines and letter forms, much like
9025-502: Was via indirect address pointers held in memory. Certain pointer cells would auto-increment when used. Stack operations were not supported. Programming of this minicomputer was via assembler language. It was not object code compatible with anything else and so had limited tool support. Imlac eventually added a self-hosted Fortran compiler with hour-long compiles due to the cramped memory. Some PDS models had an optional IBM 2310 cartridge disk drive or 8-inch floppy drive. These ran
#727272