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Intel X79

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The Intel X79 ( codenamed Patsburg ) is a Platform Controller Hub (PCH) designed and manufactured by Intel for their LGA 2011 (Socket R) and LGA 2011-1 (Socket R2).

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50-539: Socket and chipset support CPUs targeted at the high-end desktop (HEDT) and enthusiast segments of the Intel product lineup: Core i7 -branded and Xeon -branded processors from the Sandy Bridge and Ivy Bridge CPU architectures. The supported CPUs feature quad channel memory controllers, and a certain number of PCIe lanes, the chipset features additional PCIe lanes; it is designed to connect an Intel processor through

100-1225: A DMI 2.0 interface to peripheral devices. The first product was announced on November 14, 2011, for "Extreme" CPUs using the LGA 2011 socket. Features include: The X79 chipset is made to work with the Intel LGA 2011 (Socket R) which features 2011 copper pins. The added pins allow for more PCI Express lanes and interconnects for server class processors. Newer Core and Xeon processors address 40 PCI Express 3.0 lanes directly through Sandy Bridge-E architecture (Xeon) and Ivy Bridge architecture (Core processors). The X79 chipset does not support installing Windows XP in AHCI mode for Intel's Serial ATA controllers as Intel won't release AHCI drivers for 32-bit Windows XP. Windows XP can be installed in IDE mode but without SATA features enabled. For users that dual boot Windows XP with another operating system installed in AHCI mode, this means changing to IDE mode every time to boot into Windows XP and changing back to SATA to boot

150-580: A 45 nm lithography and support front side bus speeds ranging from 533 MT/s to 1.6 GT/s. In addition, the 45 nm die shrink of the Core microarchitecture adds SSE4.1 support to all Core 2 microprocessors manufactured at a 45 nm lithography, therefore increasing the calculation rate of the processors. The Core 2 Solo, introduced in September 2007, is the successor to the Core Solo and

200-565: A Core i3 processor is used with a server chipset platform such as Intel 3400/3420/3450, the CPU supports ECC with UDIMM. When asked, Intel confirmed that, although the Intel 5 series chipset supports non-ECC memory only with the Core i5 or i3 processors, using those processors on a motherboard with 3400 series chipsets it supports the ECC function of ECC memory. A limited number of motherboards by other companies also support ECC with Intel Core ix processors;

250-670: A much higher price than their regular version, often $ 999 or more. With the release of the Nehalem microarchitecture in November 2008, Intel introduced a new naming scheme for its Core processors. There are three variants, Core i3, Core i5 and Core i7, but the names no longer correspond to specific technical features like the number of cores. Instead, the brand is now divided from low-level (i3), through mid-range (i5) to high-end performance (i7), which correspond to three, four and five stars in Intel's Intel Processor Rating following on from

300-466: A quad-core processor. This allows twice the performance of a dual-core processors at the same clock frequency in scenarios that take advantage of multi-threading. Initially, all Core 2 Quad models were versions of Core 2 Duo desktop processors, Kentsfield derived from Conroe and Yorkfield from Wolfdale, but later Penryn-QC was added as a high-end version of the mobile dual-core Penryn. The Xeon 32xx and 33xx processors are mostly identical versions of

350-533: A trend toward higher levels of system integration and management functionality (and along with that, increased performance) through the ongoing evolution of facilities such as Intel Active Management Technology (iAMT). As of 2017, the Core brand comprised four product lines – the entry level i3, the mainstream i5, the high-end i7, and the "enthusiast" i9. Core i7 was introduced in 2008, followed by i5 in 2009, and i3 in 2010. The first Core i9 models were released in 2017. In 2023, Intel announced that it would drop

400-476: A variety of execution units in parallel - looking ahead through the incoming instructions in order to optimise them. This leads to the instructions per cycle completed being much higher than 1 and is responsible for much of the speed improvements in subsequent CPU generations. The calculation of IPC is done through running a set piece of code, calculating the number of machine-level instructions required to complete it, then using high-performance timers to calculate

450-514: Is a brand that promises no internal consistency or continuity, the processors within this family have been, for the most part, broadly similar. The first products receiving this designation were the Core Solo and Core Duo Yonah processors for mobile from the Pentium M design tree, fabricated at 65 nm and brought to market in January 2006. These are substantially different in design than

500-522: Is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for midrange , embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation . These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for

550-494: Is also available as Core i5 and Pentium, with slightly different configurations. The Core i3-3xxM processors are based on Arrandale , the mobile version of the Clarkdale desktop processor. They are similar to the Core i5-4xx series but running at lower clock speeds and without Turbo Boost . According to an Intel FAQ they do not support Error Correction Code (ECC) memory . According to motherboard manufacturer Supermicro, if

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600-454: Is available only as an ultra-low-power mobile processor with 5.5 Watt thermal design power. The original U2xxx series "Merom-L" used a special version of the Merom chip with CPUID number 10661 (model 22, stepping A1) that only had a single core and was also used in some Celeron processors. The later SU3xxx are part of Intel's CULV range of processors in a smaller μFC-BGA 956 package but contain

650-482: Is one aspect of a processor 's performance: the average number of instructions executed for each clock cycle . It is the multiplicative inverse of cycles per instruction . While early generations of CPUs carried out all the steps to execute an instruction sequentially, modern CPUs can do many things in parallel. As it is impossible to just keep doubling the speed of the clock, instruction pipelining and superscalar processor design have evolved so CPUs can use

700-448: Is reduced to 3 MB, while the Core i5-6xx uses the full cache, Clarkdale is sold as Core i5-6xx, along with related Core i3 and Pentium processors. It has Hyper-Threading enabled and the full 4 MB L3 cache. According to Intel "Core i5 desktop processors and desktop boards typically do not support ECC memory", but information on limited ECC support in the Core i3 section also applies to Core i5 and i7. The Core i7 brand targets

750-422: Is usually meaningless. The useful work that can be done with any computer depends on many factors besides the processor speed. These factors include the instruction set architecture , the processor's microarchitecture , and the computer system organization (such as the design of the disk storage system and the capabilities and performance of other attached devices), the efficiency of the operating system , and

800-519: The FPU disabled. Intel Core Duo (product code 80539) consists of two cores on one die, a 2  MB L2 cache shared by both cores, and an arbiter bus that controls both L2 cache and FSB (front-side bus) access. The successor to Core is the mobile version of the Core 2 line of processors based on the Core microarchitecture, released on July 27, 2006. The release of the mobile version of Intel Core 2 marks

850-676: The Nehalem architecture , whose main advantage came from redesigned I/O and memory systems featuring the new Intel QuickPath Interconnect and an integrated memory controller supporting up to three channels of DDR3 memory. Subsequent performance improvements have tended toward making additions rather than profound changes, such as adding the Advanced Vector Extensions (AVX) instruction set extensions to Sandy Bridge , first released on 32 nm in January 2011. Time has also brought improved support for virtualization and

900-610: The Pentium M branded processors. The processor family used an enhanced version of the P6 microarchitecture . It emerged in parallel with the NetBurst microarchitecture (Intel P68) of the Pentium 4 brand, and was a precursor of the 64-bit Core microarchitecture of Core 2 branded CPUs. The Core brand had two branches: the Duo (dual-core) and Solo (single-core, which replaced the Pentium M brand of single-core mobile processor). Intel launched

950-691: The server and workstation markets. Core was launched in January 2006 as a mobile-only series, consisting of single- and dual-core models. It was then succeeded later in July by the Core 2 series, which included both desktop and mobile processors with up to four cores, and introduced 64-bit support. Since 2008, Intel began introducing the Core i3, Core i5, Core i7 and Core i9 lineup of processors, succeeding Core 2. A new naming scheme debuted in 2023, consisting of Core 3, Core 5, and Core 7 for mainstream processors, and Core Ultra 5, Core Ultra 7, and Core Ultra 9 for "premium" high-end processors. Although Intel Core

1000-600: The "Sandy Bridge" microarchitecture at CES 2011. New dual-core mobile processors and desktop processors arrived in February 2011. The Core i5-2xxx line of desktop processors are mostly quad-core chips, with the exception of the dual-core Core i5-2390T, and include integrated graphics, combining the key features of the earlier Core i5-6xx and Core i5-7xx lines. The suffix after the four-digit model number designates unlocked multiplier (K), low-power (S) and ultra-low-power (T). The desktop CPUs now all have four non- SMT cores (like

1050-503: The "i" moniker from their processor branding, making it "Core 3/5/7/9". The company would introduce the "Ultra" branding for high-end processors as well. The new naming scheme debuted with the launch of Raptor Lake-U Refresh and Meteor Lake processors in 2024, using the "Core 3/5/7" branding for mainstream processors and "Core Ultra 5/7/9" branding for "premium" high-end processors. The original Core brand refers to Intel's 32-bit mobile dual-core x86 CPUs, which were derived from

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1100-851: The Asus P8B WS is an example, but it does not support ECC memory under Windows non-server operating systems. Lynnfield were the first Core i5 processors using the Nehalem microarchitecture, introduced on September 8, 2009, as a mainstream variant of the earlier Core i7. Lynnfield Core i5 processors have an 8 MB L3 cache , a DMI bus running at 2.5  GT/s and support for dual-channel DDR3-800/1066/1333 memory and have Hyper-threading disabled. The same processors with different sets of features (Hyper-threading and other clock frequencies) enabled are sold as Core i7-8xx and Xeon 3400-series processors, which should not be confused with high-end Core i7-9xx and Xeon 3500-series processors based on Bloomfield . A new feature called Turbo Boost Technology

1150-538: The CPU and integrated GPU cores, unlike the earlier microarchitectures. All Core i3/i5/i7 processors with the Sandy Bridge microarchitecture have a four-digit model number. With the mobile version, the thermal design power can no longer be determined from a one- or two-letter suffix but is encoded into the CPU number. Starting with Sandy Bridge, Intel no longer distinguishes the code names of the processor based on number of cores, socket or intended usage; they all use

1200-461: The Core brand on January 6, 2006, with the release of the 32-bit Yonah CPU – Intel's first dual-core mobile (low-power) processor. Its dual-core layout closely resembled two interconnected Pentium M branded CPUs packaged as a single die (piece) silicon chip ( IC ). Hence, the 32-bit microarchitecture of Core branded CPUs – contrary to its name – had more in common with Pentium M branded CPUs than with

1250-582: The beginning of Apple's shift to Intel processors across the entire Mac line. In 2007, Intel began branding the Yonah CPUs intended for mainstream mobile computers as Pentium Dual-Core , not to be confused with the desktop 64-bit Core microarchitecture CPUs also branded as Pentium Dual-Core. September 2007 and January 4, 2008 marked the discontinuation of a number of Core branded CPUs including several Core Solo, Core Duo, Celeron and one Core 2 Quad products. Intel Core Solo (product code 80538) uses

1300-473: The board (or near to it), while operating at drastically lower clock rates. Maintaining high instructions per cycle (IPC) on a deeply pipelined and resourced out-of-order execution engine has remained a constant fixture of the Intel Core product group ever since. The new substantial bump in microarchitecture came with the introduction of the 45 nm Bloomfield desktop processor in November 2008 on

1350-474: The business and high-end consumer markets for both desktop and laptop computers, and is distinguished from the Core i3 (entry-level consumer), Core i5 (mainstream consumer), and Xeon (server and workstation) brands. Introduced in late 2008, Bloomfield was the first Core i7 processors based on the Nehalem architecture. The following year, Lynnfield desktop processors and Clarksfield mobile processors brought new quad-core Core i7 models based on

1400-419: The desktop Core 2 Quad processors and can be used interchangeably. Core 2 Extreme processors are enthusiast versions of Core 2 Duo and Core 2 Quad processors, usually with a higher clock frequency and an unlocked clock multiplier , which makes them especially attractive for overclocking . This is similar to earlier Pentium D processors labeled as Extreme Edition . Core 2 Extreme processors were released at

1450-458: The entry-level Celeron (one star) and Pentium (two stars) processors. Common features of all Nehalem based processors include an integrated DDR3 memory controller as well as QuickPath Interconnect or PCI Express and Direct Media Interface on the processor replacing the aging quad-pumped Front Side Bus used in all earlier Core processors. All these processors have 256 KB L2 cache per core, plus up to 12 MB shared L3 cache. Because of

1500-484: The full L2 cache of 2, 3, 4, or 6 MB available in the specific stepping of the chip, while versions with the amount of cache reduced during manufacturing are sold for the low-end consumer market as Celeron or Pentium Dual-Core processors. Like those processors, some low-end Core 2 Duo models disable features such as Intel Virtualization Technology . Core 2 Quad processors are multi-chip modules consisting of two dies similar to those used in Core 2 Duo, forming

1550-400: The future. In early 2011, Intel introduced a new microarchitecture named Sandy Bridge . This is the second generation of the Core processor microarchitecture. It kept all the existing brands from Nehalem, including Core i3/i5/i7, and introduced new model numbers. The initial set of Sandy Bridge processors includes dual- and quad-core variants, all of which use a single 32 nm die for both

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1600-545: The highest-performing Core i7 processors use the same socket and QPI -based architecture as the medium-end Xeon processors of that generation, while lower-performing Core i7 processors use the same socket and PCIe/DMI/FDI architecture as the Core i5. "Core i7" is a successor to the Intel Core 2 brand. Intel representatives stated that they intended the moniker Core i7 to help consumers decide which processor to purchase as Intel releases newer Nehalem-based products in

1650-411: The i5-750), with the exception of the i5-2390T. The DMI bus runs at 5 GT/s. The mobile Core i5-2xxxM processors are all dual-core and hyper-threaded chips like the previous Core i5-5xxM series, and share most of the features with that product line. The Core i7 brand was the high-end for Intel's desktop and mobile processors, until the announcement of the i9 in 2017. Its Sandy Bridge models feature

1700-429: The largest amount of L3 cache and the highest clock frequency. Most of these models are very similar to their smaller Core i5 siblings. The quad-core mobile Core i7-2xxxQM/XM processors follow the previous "Clarksfield" Core i7-xxxQM/XM processors, but now also include integrated graphics. Instructions per cycle In computer architecture , instructions per cycle ( IPC ), commonly called instructions per clock ,

1750-571: The more performance oriented Pxxxx (25 W) and Txxxx (35 W) mobile versions and the Exxxx (65 W) desktop models. The mobile Core 2 Duo processors with an 'S' prefix in the name are produced in a smaller μFC-BGA 956 package, which allows building more compact laptops. Within each line, a higher number usually refers to a better performance, which depends largely on core and front-side bus clock frequency and amount of second level cache, which are model-specific. Core 2 Duo processors typically use

1800-455: The new I/O interconnect, chipsets and mainboards from previous generations can no longer be used with Nehalem-based processors. Intel intended the Core i3 as the new low end of the performance processor line from Intel, following the retirement of the Core 2 brand. The first Core i3 processors were launched on January 7, 2010. The first Nehalem based Core i3 was Clarkdale -based, with an integrated GPU and two cores. The same processor

1850-581: The new microarchitecture. While they require new sockets and chipsets, the user-visible features of the Core i3 are largely unchanged, including the lack of support for Turbo Boost and AES-NI . Unlike the Sandy Bridge-based Celeron and Pentium processors, the Core i3 line does support the new Advanced Vector Extensions . This particular processor is the entry-level processor of this new series of Intel processors. In January 2011, Intel released new quad-core Core i5 processors based on

1900-454: The number of clock cycles required to complete it on the actual hardware. The final result comes from dividing the number of instructions by the number of CPU clock cycles. The number of instructions per second and floating point operations per second for a processor can be derived by multiplying the number of instructions per cycle with the clock rate (cycles per second given in Hertz ) of

1950-406: The original Core Duo and the new Core 2 Duo is an increase in the amount of level 2 cache . The new Core 2 Duo has tripled the amount of on-board cache to 6 MB. Core 2 also introduced a quad-core performance variant to the single- and dual-core chips, branded Core 2 Quad, as well as an enthusiast variant, Core 2 Extreme. All three chips are manufactured at a 65 nm lithography , and in 2008,

2000-604: The other OS, or installing the other OS which supports AHCI also in IDE mode to prevent switching the setting in the BIOS each time. This restriction applies only to 32-bit Windows XP; 64-bit Windows XP is supported by Intel drivers. For motherboards with X79 chipset but with third party SATA disk controllers, 32-bit Windows XP AHCI drivers may still be supported by the disk controller vendor (non-Intel). A third party, generic Intel AHCI/RAID driver for 32-bit Windows XP has been released by Fernando. Intel Core i7 Intel Core

2050-557: The presence of multiple arithmetic logic units (an ALU is a processor subsystem that can perform elementary arithmetic and logical operations), and short pipelines. When comparing different instruction sets , a simpler instruction set may lead to a higher IPC figure than an implementation of a more complex instruction set using the same chip technology; however, the more complex instruction set may be able to achieve more useful work with fewer instructions. As such comparing IPC figures between different instruction sets (for example x86 vs ARM)

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2100-481: The processor in question. The number of instructions per second is an approximate indicator of the likely performance of the processor. The number of instructions executed per clock is not a constant for a given processor; it depends on how the particular software being run interacts with the processor, and indeed the entire machine, particularly the memory hierarchy . However, certain processor features tend to lead to designs that have higher-than-average IPC values;

2150-544: The rest of the Intel Core product group, having derived from the Pentium Pro lineage that predated Pentium 4 . The first Intel Core desktop processor—and typical family member—came from the Conroe iteration, a 65 nm dual-core design brought to market in July 2006, based on the Intel Core microarchitecture with substantial enhancements in micro-architectural efficiency and performance, outperforming Pentium 4 across

2200-512: The reunification of Intel's desktop and mobile product lines as Core 2 processors were released for desktops and notebooks, unlike the first Intel Core CPUs that were targeted only for notebooks (although they were used in some small form factor and all-in-one desktops, like the iMac and the Mac Mini ). Unlike the original Core, Intel Core 2 is a 64-bit processor, supporting Intel Extended Memory 64 Technology (EM64T). Another difference between

2250-694: The said architecture. After Nehalem received a 32 nm Westmere die shrink, Arrandale dual-core mobile processors were introduced in January 2010, followed by Core i7's first six-core desktop processor Gulftown on March 16, 2010. Both the regular Core i7 and the Extreme Edition are advertised as five stars in the Intel Processor Rating. The first-generation Core i7 uses two different sockets; LGA 1366 designed for high-end desktops and servers, and LGA 1156 used in low- and mid-end desktops and servers. In each generation,

2300-461: The same Penryn chip as the dual-core variants, with one of the cores disabled during manufacturing. The majority of the desktop and mobile Core 2 processor variants are Core 2 Duo with two processor cores on a single Merom , Conroe , Allendale , Penryn , or Wolfdale chip. These come in a wide range of performance and power consumption, starting with the relatively slow ultra-low-power Uxxxx (10 W) and low-power Lxxxx (17 W) versions, to

2350-464: The same code name as the microarchitecture itself. Ivy Bridge is the codename for Intel's 22 nm die shrink of the Sandy Bridge microarchitecture based on tri-gate ("3D") transistors, introduced in April 2012. Released on January 20, 2011, the Core i3-2xxx line of desktop and mobile processors is a direct replacement of the 2010 "Clarkdale" Core i3-5xx and "Arrandale" Core i3-3xxM models, based on

2400-498: The same two-core die as the Core Duo, but features only one active core. Depending on demand, Intel may also simply disable one of the cores to sell the chip at the Core Solo price—this requires less effort than launching and maintaining a separate line of CPUs that physically only have one core. Intel had used the same strategy previously with the 486 CPU in which early 486SX CPUs were in fact manufactured as 486DX CPUs but with

2450-564: The subsequent 64-bit Core microarchitecture of Core 2 branded CPUs. Despite a major rebranding effort by Intel starting January 2006, some companies continued to market computers with the Yonah core marked as Pentium M. The Core series is also the first Intel processor used in an Apple Macintosh computer. The Core Duo was the CPU for the first generation MacBook Pro , while the Core Solo appeared in Apple's Mac Mini line. Core Duo signified

2500-542: Was introduced which maximizes speed for demanding applications, dynamically accelerating performance to match the workload. After Nehalem received a 32 nm Westmere die shrink, Arrandale , the dual-core mobile Core i5 processors and its desktop counterpart Clarkdale was introduced in January 2010, together with Core i7-6xx and Core i3-3xx processors based on the same architecture. Arrandale processors have integrated graphics capability. Core i3-3xx does not support for Turbo Boost , L3 cache in Core i5-5xx processors

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