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105-449: Modern LPDDR SDRAM is distinct from DDR SDRAM , with various differences that make the technology more appropriate for mobile applications. LPDDR technology standards are developed independently of DDR standards, with LPDDR4X and even LPDDR5 for example being implemented prior to DDR5 SDRAM and offering far higher data rates than DDR4 SDRAM . In contrast with standard SDRAM, used in stationary devices and laptops and usually connected over

210-420: A 1 GB memory module are usually organized as 2 8-bit words, commonly expressed as 64M×8. Memory manufactured in this way is low-density RAM and is usually compatible with any motherboard specifying PC3200 DDR-400 memory. DDR (DDR1) was superseded by DDR2 SDRAM , which had modifications for a higher clock frequency and again doubled throughput, but operates on the same principle as DDR. Competing with DDR2

315-439: A 64-bit wide memory bus, LPDDR also permits 16- or 32-bit wide channels. The "E" and "X" versions mark enhanced versions of the specifications. They formalize overclocking the memory array by usually 33%. As with standard SDRAM, most generations double the internal fetch size and external transfer speed. (DDR4 and LPDDR5 being the exceptions.) The original low-power DDR (sometimes retroactively called LPDDR1 ), released in 2006

420-559: A Read command. Unlike DRAM, the bank address bits are not part of the memory address; any address can be transferred to any row data buffer. A row data buffer may be from 32 to 4096 bytes long, depending on the type of memory. Rows larger than 32 bytes ignore some of the low-order address bits in the Activate command. Rows smaller than 4096 bytes ignore some of the high-order address bits in the Read command. Non-volatile memory does not support

525-945: A bandwidth of 9.6 Gbps. It operates in the ultra-low voltage range of 1.01–1.12 V set by JEDEC . It has been incorporated into the LPDDR5X standard as LPDDR5X-9600 making "LPDDR5T" a brand name. MediaTek Dimensity 9300 and Qualcomm Snapdragon 8 Gen 3 supports LPDDR5T. DDR SDRAM Double Data Rate Synchronous Dynamic Random-Access Memory ( DDR SDRAM ) is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers . DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM , DDR3 SDRAM , DDR4 SDRAM and DDR5 SDRAM . None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work on DDR1-equipped motherboards , and vice versa. Compared to single data rate ( SDR ) SDRAM,

630-553: A control panel accessed by swiping up from the bottom of the screen. Control Center contains a number of commonly used functions, such as volume and brightness controls, along with toggles for enabling Wi-Fi, Bluetooth, Airplane mode , and for using the rear camera's flash LED as a flashlight. iTunes Radio , an Internet radio service, was also included on the iPhone 5s. It was a free, ad-supported service available to all iTunes users, featuring Siri integration on iOS. Users were able to skip tracks, customize stations, and purchase

735-611: A correct match. Most DDR SDRAM operates at a voltage of 2.5 V, compared to 3.3 V for SDRAM. This can significantly reduce power consumption. Chips and modules with the DDR-400/PC-3200 standard have a nominal voltage of 2.6 V. JEDEC Standard No. 21–C defines three possible operating voltages for 184 pin DDR, as identified by the key notch position relative to its centreline. Page 4.5.10-7 defines 2.5V (left), 1.8V (centre), TBD (right), while page 4.20.5–40 nominates 3.3V for

840-466: A corresponding increase in clock frequency. One advantage of keeping the clock frequency low is that it reduces the signal integrity requirements on the circuit board connecting the memory to the controller. The name "double data rate" refers to the fact that a DDR SDRAM with a certain clock frequency achieves nearly twice the bandwidth of a SDR SDRAM running at the same clock frequency, due to this double pumping. With data being transferred 64 bits at

945-410: A data rate of 1600 MT/s and utilizes key new technologies: write-leveling and command/address training, optional on-die termination (ODT), and low-I/O capacitance. LPDDR3 supports both package-on-package (PoP) and discrete packaging types. The command encoding is identical to LPDDR2, using a 10-bit double data rate CA bus. However, the standard only specifies 8 n -prefetch DRAM, and does not include

1050-473: A fingerprint sensor on the home button in the beta release of iOS 7 and leaked packaging for an iPhone 5s showing that the traditional home button now had a metallic "ring" around it. Similar ring-based imagery was seen on the official invitation to Apple's iPhone press event in September 2013, where the new device was unveiled. Shortly before its official unveiling, The Wall Street Journal also reported

1155-476: A flat, colorful design. Among new software features introduced to the iPhone 5s were AirDrop , an ad-hoc Wi-Fi sharing platform; Control Center, a control panel containing a number of commonly used functions; and iTunes Radio , an internet radio service. The 5s is the first iPhone to be supported through six major versions of iOS, from iOS 7 to iOS 12 , along with the iPhone 6s and the first-generation iPhone SE which were supported from iOS 9 to iOS 15 , and

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1260-401: A gimmick, but it's a real advance, the biggest step ever in biometric authentication for everyday devices," and labeled it "the best smartphone on the market." David Pogue of The New York Times praised Touch ID, but said that the innovation of the smartphone market has been saturated, and "maybe the age of annual mega-leaps is over." He focused much of his review on iOS 7, which he believed

1365-460: A graphics boost of up to 32% and 38% in CPU benchmarks." The debut of Apple's 64-bit A7 processor took rival Android smartphone makers by surprise, particularly Qualcomm whose own 64-bit system-on-chip was not released until 2015. Most reviewers recommended the iPhone 5s over the iPhone 5c which was released at the same time. The 5c retained almost the same hardware as the discontinued iPhone 5, while

1470-581: A record for first weekend smartphone sales, with the 5s selling three times more units than the 5c. After the first day of release, 1% of all iPhones in the US were iPhone 5Ss, while 0.3% were iPhone 5Cs. Gene Munster of Piper Jaffray reported that the line at the Fifth Avenue Apple Store contained 1,417 people on release day, compared to 1,300 for the iPhone 4 in 2010, and 549 for the iPhone 3G in 2008 on their respective release days. This

1575-422: A significant number of customers who preferred the 4-inch screen size of iPhone 5s, which remained the second-most popular iPhone after the iPhone 6 and ahead of the iPhone 6s. Apple stated in their event that they sold 30 million 4-inch iPhones in 2015, even as that form factor was succeeded as the flagship iPhone by the redesigned larger display 4.7/5.5-inch iPhone 6 and 6 Plus back in September 2014. Furthermore,

1680-504: A single package. According to the company, the new modules would use 20% less power than LPDDR5. According to Andrei Frumusanu of AnandTech , LPDDR5X in SoCs and other products was expected for the 2023 generation of devices. On 19 November 2021, Micron announced that Mediatek has validated its LPDDR5X DRAM for Mediatek's Dimensity 9000 5G SoC. On 25 January 2023 SK Hynix announced "Low Power Double Data Rate 5 Turbo" (LPDDR5T) chips with

1785-697: A single-channel die option for smaller applications, new MCP, PoP and IoT packages, and additional definition and timing improvements for the highest 4266 MT/s speed grade. On 19 February 2019, JEDEC published the JESD209-5, Standard for Low Power Double Data Rate 5 (LPDDR5). Samsung announced it had working prototype LPDDR5 chips in July 2018. LPDDR5 introduces the following changes: AMD Van Gogh, Intel Tiger Lake , Apple silicon (M1 Pro, M1 Max, M1 Ultra, M2 and A16 Bionic), Huawei Kirin 9000 and Snapdragon 888 memory controllers support LPDDR5. The doubling of

1890-565: A starting position within the 32-word aligned burst using the C0 and B3 bits. On 28 July 2021, JEDEC published the JESD209-5B, Standard for Low Power Double Data Rate 5/5X (LPDDR5/5X) with the following changes: On 9 November 2021, Samsung announced that the company has developed the industry's first LPDDR5X DRAM. Samsung's implementation involves 16-gigabit (2 GB) dies, on a 14 nm process node, with modules with up to 32 dies (64 GB) in

1995-567: A time, DDR SDRAM gives a transfer rate (in bytes/s) of (memory bus clock rate) × 2 (for dual rate) × 64 (number of bits transferred) / 8 (number of bits/byte). Thus, with a bus frequency of 100 MHz, DDR SDRAM gives a maximum transfer rate of 1600  MB/s . In the late 1980s IBM invented DDR SDRAM, they built a dual-edge clocking RAM and presented their results at the International Solid-State Circuits Convention in 1990. Samsung released

2100-406: A unit. In the US, Apple offered an online reservation system, so customers could keep checking for units available at their local Apple Stores, and order for pickup. Online orders were also in short supply on launch day, with the shipping date across all model sizes and colors changing from "7-10 working days" to "October" in all countries, within hours of online orders being taken. The iPhone 5s

2205-428: Is DDR SDRAM designed to operate at 200 MHz using DDR-400 chips with a bandwidth of 3,200 MB/s. Because PC3200 memory transfers data on both the rising and falling clock edges, its effective clock rate is 400 MHz. 1 GB PC3200 non-ECC modules are usually made with 16 512 Mbit chips, 8 on each side (512 Mbits × 16 chips) / (8 bits (per byte)) = 1,024 MB. The individual chips making up

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2310-467: Is a smartphone that was developed and marketed by Apple Inc. It is the seventh generation of the iPhone , succeeding the iPhone 5 , and unveiled in September 2013, alongside the iPhone 5c . The iPhone 5s maintained almost the same external design as well as the same 4-inch screen as its predecessor, the iPhone 5. Although the 5s received a new white/gold color scheme in addition to white/silver and space gray/black. The 5s features upgrades mostly in

2415-808: Is a common belief that number of module ranks equals number of sides. As above data shows, this is not true. One can also find 2-side/1-rank modules. One can even think of a 1-side/2-rank memory module having 16(18) chips on single side ×8 each, but it is unlikely such a module was ever produced. From Ballot JCB-99-70, and modified by numerous other Board Ballots, formulated under the cognizance of Committee JC-42.3 on DRAM Parametrics. Standard No. 79 Revision Log: "This comprehensive standard defines all required aspects of 64Mb through 1Gb DDR SDRAMs with X4/X8/X16 data interfaces, including features, functionality, ac and dc parametrics, packages and pin assignments. This scope will subsequently be expanded to formally apply to x32 devices, and higher density devices as well." PC3200

2520-539: Is a product of bits per chip and number of chips. It also equals number of ranks (rows) multiplied by DDR memory bus width. Consequently, a module with a greater number of chips or using ×8 chips instead of ×4 will have more ranks. This example compares different real-world server memory modules with a common size of 1 GB. One should definitely be careful buying 1 GB memory modules, because all these variations can be sold under one price position without stating whether they are ×4 or ×8, single- or dual-ranked. There

2625-405: Is a product of one chip's capacity and the number of chips. ECC modules multiply it by 8 ⁄ 9 because they use 1 bit per byte (8 bits) for error correction. A module of any particular size can therefore be assembled either from 32 small chips (36 for ECC memory), or 16(18) or 8(9) bigger ones. DDR memory bus width per channel is 64 bits (72 for ECC memory). Total module bit width

2730-514: Is a slightly modified form of DDR SDRAM , with several changes to reduce overall power consumption. Most significantly, the supply voltage is reduced from 2.5 to 1.8 V. Additional savings come from temperature-compensated refresh (DRAM requires refresh less often at low temperatures), partial array self refresh, and a "deep power down" mode which sacrifices all memory contents. Additionally, chips are smaller, using less board space than their non-mobile equivalents. Samsung and Micron are two of

2835-479: Is active- high . The first cycle of a command is identified by chip select being high; it is low during the second cycle. The CAS-2 command is used as the second half of all commands that perform a transfer across the data bus, and provides low-order column address bits: The burst length can be configured to be 16, 32, or dynamically selectable by the BL bit of read and write operations. One DMI (data mask/invert) signal

2940-463: Is associated with each 8 data lines, and can be used to minimize the number of bits driven high during data transfers. When high, the other 8 bits are complemented by both transmitter and receiver. If a byte contains five or more 1 bits, the DMI signal can be driven high, along with three or fewer data lines. As signal lines are terminated low, this reduces power consumption. (An alternative usage, where DMI

3045-564: Is available at effective transfer rates of 400 MHz and higher. DDR3 advances extended the ability to preserve internal clock rates while providing higher effective transfer rates by again doubling the prefetch depth. The DDR4 SDRAM is a high-speed dynamic random-access memory internally configured as 16 banks, 4 bank groups with 4 banks for each bank group for ×4/×8 and 8 banks, 2 bank groups with 4 banks for each bank group for ×16 DRAM. The DDR4 SDRAM uses an 8 n prefetch architecture to achieve high-speed operation. The 8 n prefetch architecture

3150-672: Is combined with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write operation for the DDR4 SDRAM consists of a single 8 n -bit-wide 4-clock data transfer at the internal DRAM core and 8 corresponding n -bit-wide half-clock-cycle data transfers at the I/O pins. RDRAM was a particularly expensive alternative to DDR SDRAM, and most manufacturers dropped its support from their chipsets. DDR1 memory's prices substantially increased from Q2 2008, while DDR2 prices declined. In January 2009, 1 GB DDR1

3255-406: Is enabled. LPDDR4 also includes a mechanism for "targeted row refresh" to avoid corruption due to " row hammer " on adjacent rows. A special sequence of three activate/precharge sequences specifies the row which was activated more often than a device-specified threshold (200,000 to 700,000 per refresh cycle). Internally, the device refreshes physically adjacent rows rather than the one specified in

LPDDR - Misplaced Pages Continue

3360-522: Is manufactured are also standardized by JEDEC. There is no architectural difference between DDR SDRAM modules. Modules are instead designed to run at different clock frequencies: for example, a PC-1600 module is designed to run at 100 MHz , and a PC-2100 is designed to run at 133 MHz . A module's clock speed designates the data rate at which it is guaranteed to perform, hence it is guaranteed to run at lower ( underclocking ) and can possibly run at higher ( overclocking ) clock rates than those for which it

3465-410: Is no longer concave, nor does it contain the familiar squircle icon seen on previous models. The phone itself is 0.30 in (7.6 mm) thick and weighs 112 grams (4.0 oz). The phone uses an aluminum composite frame. The device is available in three color finishes; "space gray" (replacing black with slate trim on the iPhone 5), white with silver trim, and white with gold trim. The iPhone 5s

3570-457: Is not an easy process in either time or effort, given that the user has to use a high resolution photocopy of a complete fingerprint, special chemicals and expensive equipment, and because the spoofing process takes some time to achieve. Several problems were experienced with the iPhone 5s's hardware after its release. The most widely reported issue is that the angle reported by the phone's level sensor had drifted by several degrees, which caused

3675-547: Is the case for the Exynos 5 Dual and the 5 Octa. An "enhanced" version of the specification called LPDDR3E increases the data rate to 2133 MT/s. Samsung Electronics introduced the first 4  gigabit 20 nm-class LPDDR3 modules capable of transmitting data at up to 2,133 MT/s, more than double the performance of the older LPDDR2 which is only capable of 800 MT/s. Various SoCs from various manufacturers also natively support 800 MHz LPDDR3 RAM. Such include

3780-402: Is used to limit the number of data lines which toggle on each transfer to at most 4, minimises crosstalk. This may be used by the memory controller during writes, but is not supported by the memory devices.) Data bus inversion can be separately enabled for reads and writes. For masked writes (which have a separate command code), the operation of the DMI signal depends on whether write inversion

3885-571: The Snapdragon 600 and 800 from Qualcomm as well as some SoCs from the Exynos and Allwinner series. On 14 March 2012, JEDEC hosted a conference to explore how future mobile device requirements will drive upcoming standards like LPDDR4. On 30 December 2013, Samsung announced that it had developed the first 20 nm-class 8 gigabit (1 GB) LPDDR4 capable of transmitting data at 3,200 MT/s, thus providing 50 percent higher performance than

3990-619: The iPhone 4s and iPhone 5 respectively. A number of technology writers, including Adrian Kingsley-Hughes of ZDNet and Kevin Roose of New York believed that the fingerprint scanning functionality of the iPhone 5s could help spur the adoption of the technology as an alternative to passwords by mainstream users (especially in " bring your own device " scenarios), as fingerprint-based authentication systems have only enjoyed wider usage in enterprise environments. However, citing research by biometrics engineer Geppy Parziale, Roose suggested that

4095-572: The iPhone 6s and iPhone 6s Plus The iPhone 5s was discontinued on March 21, 2016, and succeeded by the first-generation iPhone SE , which continues the same form factor but features vastly upgraded internals similar to the flagship iPhone 6s . This was a break with Apple's product positioning trend (in North America and Western Europe ), starting with iPhone 4s released in October 2011, which gave each newly released model one year as

4200-464: The "sub-epidermal layers" of fingers at 500 pixels per inch , and uses a 360-degree design that can read the print at any angle. The sensor itself is activated by a touch-sensitive metallic ring surrounding the button. Touch ID can be used for various authentication activities within the operating system, such as unlocking the device or authenticating App Store and iTunes purchases instead of an Apple ID password. The sensor can be trained to recognize

4305-480: The 1080p video recording have a resolution of 720p. The iPhone 5s's camera was paired with a dual-LED flash, allowing for higher-quality nighttime photos. iOS 7 introduced a new camera app, allowing the iPhone 5s to capture fast continuous shots and record slow-motion videos with 720p at 120 frames per second and an audio track, making it the first iPhone to be able to record at any frame rate beyond 30 frames per second. An analysis by GSM Arena suggests that

LPDDR - Misplaced Pages Continue

4410-413: The 5/5s design was regarded as "long been the golden child of Apple phone design and a benchmark for phones in general" (with the 5s's gold finish adding a premium touch to the 5's already well-regarded look), while the succeeding 6 and 6S design was less critically acclaimed as it "felt a little bit wrong, as though you were holding a slick $ 650 bar of soap". The iPhone 5 was described as "elegance rooted in

4515-432: The 5c as a flop because of supply chain cuts signifying a decline in demand, the 5s was viewed as a massive success. Apple admitted that it had failed to anticipate the sales ratio, leading to an overstocking of the 5c and shortages of the 5s. Six months after the release of the iPhone 5s, on March 25, 2014, Apple announced that sales of the iPhone brand had exceeded 500 million units. By May 2014, despite having been on

4620-585: The A7's processing power and the device's camera using untouched photographs. Apple also announced during the keynote that iOS 7 would be available on September 18, 2013. On September 20, 2013, the iPhone 5s was released in the United States , United Kingdom , Canada , China , France , Germany , Australia , Japan , Hong Kong , and Singapore . It was released in 25 additional countries on October 25, 2013, and in 12 countries on November 1, 2013. Indonesia

4725-508: The BA2 signal, and do not support per-bank refresh. Non-volatile memory devices do not use the refresh commands, and reassign the precharge command to transfer address bits A20 and up. The low-order bits (A19 and down) are transferred by a following Activate command. This transfers the selected row from the memory array to one of 4 or 8 (selected by the BA bits) row data buffers, where they can be read by

4830-515: The CAS command comes before the read or write command. In fact, it is something of a misnomer, in that it does not select a column at all. Instead, its primary function is to prepare the DRAM to synchronize with the imminent start of the high-speed WCK clock. The WS_FS, WS_RD and WS_WR bits select various timings, with the _RD and _WR options optimized for an immediately following read or write command, while

4935-573: The CMOS-based sensor could become inaccurate and wear out over time unless Apple had designed the sensor to prevent this from occurring. Brent Kennedy, a researcher of the United States Computer Emergency Readiness Team , recommended that users not immediately rely on the technology, citing the uncertainty over whether the system could properly reject a spoofed fingerprint. Following the release of

5040-490: The DDR SDRAM interface makes higher transfer rates possible through more strict control of the timing of the electrical data and clock signals. Implementations often have to use schemes such as phase-locked loops and self-calibration to reach the required timing accuracy. The interface uses double pumping (transferring data on both the rising and falling edges of the clock signal ) to double data bus bandwidth without

5145-570: The Write command to row data buffers. Rather, a series of control registers in a special address region support Read and Write commands, which can be used to erase and program the memory array. In May 2012, JEDEC published the JESD209-3 Low Power Memory Device Standard. In comparison to LPDDR2, LPDDR3 offers a higher data rate, greater bandwidth and power efficiency, and higher memory density. LPDDR3 achieves

5250-609: The _FS option starts the clock immediately, and may be followed by multiple reads or writes, accessing multiple banks. CAS also specifies the "write X" option. If the WRX bit is set, writes do not transfer data, but rather fill the burst with all-zeros or all-ones, under the control of the WXS (write-X select) bit. This takes the same amount of time, but saves energy. In addition to the usual bursts of 16, there are commands for performing double-length bursts of 32. Reads (but not writes) may specify

5355-472: The activate command. Samsung Semiconductor proposed an LPDDR4 variant that it called LPDDR4X. LPDDR4X is identical to LPDDR4 except additional power is saved by reducing the I/O voltage (Vddq) from 1.1 V to 0.6 V. On 9 January 2017, SK Hynix announced 8 and 16 GB LPDDR4X packages. JEDEC published the LPDDR4X standard on 8 March 2017. Aside from the lower voltage, additional improvements include

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5460-407: The camera, keyboard and other functions. The iPhone 5s did not receive iOS 13 , released in September 2019. During the keynote, Apple announced a case for the iPhone 5s that was made of soft microfiber on the inside and leather on the outside. This case was announced along with iPhone 5c's case, both of which were the first cases Apple had announced since the iPhone 4 Bumpers. Docks for both

5565-463: The command sent on the cycle that CKE is first dropped selects the power-down state: The mode registers have been greatly expanded compared to conventional SDRAM, with an 8-bit address space, and the ability to read them back. Although smaller than a serial presence detect EEPROM, enough information is included to eliminate the need for one. S2 devices smaller than 4  Gbit , and S4 devices smaller than 1 Gbit have only four banks. They ignore

5670-426: The command/address bus becoming a bottleneck. LPDDR4 multiplexes the control and address lines onto a 6-bit single data rate CA bus. Commands require 2 clock cycles, and operations encoding an address (e.g., activate row, read or write column) require two commands. For example, to request a read from an idle chip requires four commands taking 8 clock cycles: Activate-1, Activate-2, Read, CAS-2. The chip select line (CS)

5775-472: The control and address lines onto a 10-bit double data rate CA bus. The commands are similar to those of normal SDRAM , except for the reassignment of the precharge and burst terminate opcodes: Column address bit C0 is never transferred, and is assumed to be zero. Burst transfers thus always begin at even addresses. LPDDR2 also has an active-low chip select (when high, everything is a NOP) and clock enable CKE signal, which operate like SDRAM. Also like SDRAM,

5880-595: The earphones sounded better than its predecessor, reviewers felt that quality of sound produced is poor. TechRadar further opined that the EarPods are inferior to other earphones of a similar price. The iPhone 5s was initially supplied with iOS 7, released on September 20, 2013. Jonathan Ive , the designer of iOS 7's new elements, described the update as "bringing order to complexity", highlighting features such as refined typography, new icons, translucency, layering, physics, and gyroscope-driven parallaxing as some of

5985-602: The effective clock rates of DDR2 are higher than DDR, the overall performance was not greater in the early implementations, primarily due to the high latencies of the first DDR2 modules. DDR2 started to be effective by the end of 2004, as modules with lower latencies became available. Memory manufacturers stated that it was impractical to mass produce DDR1 memory with effective transfer rates in excess of 400 MHz (i.e. 400 MT/s and 200 MHz external clock) due to internal speed limitations. DDR2 picks up where DDR1 leaves off, utilizing internal clock rates similar to DDR1, but

6090-562: The fastest LPDDR3 and consuming around 40 percent less energy at 1.1 volts. On 25 August 2014, JEDEC published the JESD209-4 LPDDR4 Low Power Memory Device Standard. Significant changes include: The standard defines SDRAM packages containing two independent 16-bit access channels, each connected to up to two dies per package. Each channel is 16 data bits wide, has its own control/address pins, and allows access to 8 banks of DRAM. Thus,

6195-413: The fastest and most advanced Apple smartphone to date." Although praised for its camera, 64-bit A7 chip, M7 motion-chip, and fingerprint scanning capabilities, some investors thought that the iPhone 5s, although a notable improvement over the iPhone 5, was still relatively unchanged from its predecessor, and worried that the iPhone line had become a stagnant, dull product. Apple's share price fell 5.4% after

6300-408: The fingerprints of multiple fingers and multiple users. Fingerprint data is stored in an encrypted format within a "secure enclave" of the A7 chip itself, and is not accessible to any other apps or servers (including iCloud ). While the camera is still 8 megapixels in resolution with the image capture size of 3264 × 2448 (4:3), the lens has a larger aperture ( f / 2.2, compared to f / 2.4 on

6405-483: The first commercial DDR SDRAM chip (64   Mbit ) in June 1998, followed soon after by Hyundai Electronics (now SK Hynix ) the same year. DDR SDRAM specification was finalized by JEDEC in June 2000 (JESD79). JEDEC has set standards for the data rates of DDR SDRAM, divided into two parts. The first specification is for memory chips, and the second is for memory modules. The first retail PC motherboard using DDR SDRAM

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6510-527: The flagship phone, then moving it to midrange for its second year of production, with the third and final year as the entry-level offering before discontinuation. While the iPhone 5s was expected to continue on sale until September 2016, replacing it and its A7 processor early meant that Apple "just reduced its long-term chip support window by a year" for iOS. In addition, a new iPhone launch was meant to stimulate demand, as sales of iPhone 6s and 6s Plus had not met expectations since their September 2015 release and

6615-459: The flash memory commands. Products using LPDDR3 include the 2013 MacBook Air, iPhone 5S , iPhone 6 , Nexus 10 , Samsung Galaxy S4 (GT-I9500) and Microsoft Surface Pro 3 and 4. LPDDR3 went mainstream in 2013, running at 800 MHz DDR (1600 MT/s), offering bandwidth comparable to PC3-12800 notebook memory in 2011 (12.8 GB/s of bandwidth). To achieve this bandwidth, the controller must implement dual-channel memory. For example, this

6720-504: The form of internal hardware; it introduced the Apple A7 64-bit dual-core system-on-chip, the first 64-bit processor to be used on a smartphone, accompanied by the M7 "motion co-processor". A redesigned home button with Touch ID , a fingerprint recognition system which can be used to unlock the phone and authenticate App Store and iTunes Store purchases, was also introduced. The camera

6825-404: The gold model in particular being in highly limited supply. While this situation eased in the US in the days following the launch, other countries reported receiving few restocks. Some commentators questioned how Apple handled the initial release, as online pre-orders were not offered for the iPhone 5s, meaning large numbers of people queuing outside physical stores, with most in line not receiving

6930-424: The group stated, "We hope that this finally puts to rest the illusions people have about fingerprint biometrics. It is plain stupid to use something that you can't change and that you leave everywhere every day as a security token." However, in 2013, 39% of American smartphone users used no security measures at all to protect their smartphone. Others have also tried Chaos Computer Club's method, but concluded that it

7035-450: The growing consumer trend towards larger screen sizes and indeed spawned the 6/6S Plus phablet models. When Apple discontinued the iPhone 5s, it was replaced by the first-generation iPhone SE which outwardly appears almost identical to the 5s even as the SE's internal hardware has been upgraded significantly. The iPhone 5s and 5c sold over nine million units in the first three days, setting

7140-486: The iPhone 5, and others expressed security concerns about the Touch ID system. Nine million units of the iPhone 5s and iPhone 5c were sold on the weekend of their release, breaking Apple's sales record for iPhones. The iPhone 5s was the best selling phone on all major U.S. carriers in September 2013. The iPhone 5s was succeeded as Apple's flagship smartphone by the larger iPhone 6 in September 2014. On March 21, 2016,

7245-462: The iPhone 5s and 5c were found on the Apple online store after the announcement. Because of the casing difference between the iPhone 5s and 5c, they have separate docks, each made specifically for each respective phone. The iPhone 5s received a positive reception from reviewers and commentators. Walt Mossberg of All Things Digital gave the phone a favorable review, saying that Touch ID "sounds like

7350-452: The iPhone 5s featured substantially improved performance/features thanks to its new 64-bit A7 processor, as well as extra storage space, all for a relatively small additional upfront cost over the iPhone 5c (US$ 650 versus US$ 550 in March 2014). This was especially the case when iOS 8 was released and both iPhone 5s and iPhone 5c were moved to the mid and low end of the iPhone range, respectively;

7455-494: The iPhone 5s still had 16 or 32 GB (14.9 or 29.8 GiB ) storage available while the iPhone 5c had to make do with 8 GB storage with only 4.9GB available to the user after installing iOS 8. Furthermore, the 5c's polycarbonate exterior received a mixed reception and was seen as a cost-cutting downgrade compared to the iPhone 5's aluminum/glass case; the 5s retained the latter design and looked even more premium due to its additional gold finish. As of 2015–16, there were still

7560-449: The iPhone 5s was discontinued following the release of the iPhone SE , which incorporated internal hardware similar to the iPhone 6s while retaining the smaller form factor and design of the 5s. Before its official unveiling, media speculation primarily centered on reports that the next iPhone would include a fingerprint scanner ; including Apple's 2013 acquisition of AuthenTec , a developer of mobile security products, references to

7665-507: The iPhone 5s, the German Chaos Computer Club announced, on September 21, 2013, that they had bypassed Apple's new Touch ID fingerprint sensor by using "easy everyday means". The group explained that the security system had been defeated by photographing a fingerprint from a glass surface and using that captured image to make a latex model thumb which was then pressed against the sensor to gain access. The spokesman for

7770-402: The iPhone family was expected to suffer its first-ever negative growth quarter in 2016. The iPhone 5s maintained a similar design to the iPhone 5, with a 4 in (10 cm) LCD multi-touch Retina display and a screen resolution of 640×1136 at 326 ppi . Its home button has been updated with a new flat design using a laser-cut sapphire cover surrounded by a metallic ring; the button

7875-499: The image quality of the supposedly 720p slow-motion footage resembles approximately 480p. Earphones known as Apple EarPods were included with the iPhone 5s. According to technology commentators, the design of the earphones is aimed to improve sound quality by allowing air to travel in and out more freely. Apple states that the design of their earphones allows it to "rival high-end headphones that cost hundreds of dollars more". Reviews by Gizmodo and TechRadar reported that although

7980-459: The launch to close at a month low of $ 467.71 on the NASDAQ . Darrell Etherington of TechCrunch who praised the iPhone 5s as the best smartphone available said "looks may not be different from the iPhone 5, but the internal components have a dramatic impact on day-to-day activities normal for a smartphone user," and went into detail explaining the impact of the improved camera and specifications on

8085-635: The main providers of this technology, which is used in tablet and phone devices such as the iPhone 3GS , original iPad , Samsung Galaxy Tab 7.0 and Motorola Droid X . In 2009, the standards group JEDEC published JESD209-2, which defined a more dramatically revised low-power DDR interface. It is not compatible with either DDR1 or DDR2 SDRAM , but can accommodate any one of: Low-power states are similar to basic LPDDR, with some additional partial array refresh options. Timing parameters are specified for LPDDR-200 to LPDDR-1066 (clock frequencies of 100 to 533 MHz). Working at 1.2 V, LPDDR2 multiplexes

8190-700: The major changes to the design. The design of both iOS 7 and OS X Yosemite (version 10.10) noticeably departs from skeuomorphic elements such as green felt in Game Center , wood in Newsstand , and leather in Calendar , in favor of flat, colorful design. iOS 7 adds AirDrop , an ad-hoc Wi-Fi sharing platform. Users can share files with the iPhone 5 onwards, the iPod Touch (5th generation) , iPad (4th generation) onwards, or iPad Mini (1st generation) onwards. The operating system also adds Control Center,

8295-401: The market for eight months, the iPhone 5s reportedly outsold the newly released Samsung Galaxy S5 by 40%, with 7 million iPhone 5s units versus 5 million Galaxy S5 units. The Galaxy S5's failure to oust the iPhone 5s from the top-selling spot was a major setback for Samsung Mobile, as the preceding Samsung Galaxy SIII and Samsung Galaxy S4 , in the first quarter of their releases, had outsold

8400-413: The names are different. LPDDR4's C0–C9 are renamed B0–B3 and C0–C5. As with LPDDR4, writes must start at a multiple-of-16 address with B0–B3 zero, but reads may request a burst be transferred in a different order by specifying a non-zero value for B3. As with LPDDR4, to read some data requires 4 commands: two activate commands to select a row, then a CAS and a read command to select a column. Unlike LPDDR4,

8505-469: The number of banks. Larger packages providing double width (four channels) and up to four dies per pair of channels (8 dies total per package) are also defined. Data is accessed in bursts of either 16 or 32 transfers (256 or 512 bits, 32 or 64 bytes, 8 or 16 cycles DDR). Bursts must begin on 64-bit boundaries. Since the clock frequency is higher and the minimum burst length longer than earlier standards, control signals can be more highly multiplexed without

8610-431: The package may be connected in three ways: Each die provides 4, 6, 8, 12, or 16  gigabits of memory, half to each channel. Thus, each bank is one sixteenth the device size. This is organized into the appropriate number (16  K to 64 K) of 16384-bit (2048-byte) rows. Extension to 24 and 32 gigabits is planned, but it is not yet decided if this will be done by increasing the number of rows, their width, or

8715-440: The phone. Etherington suggested that the 64-bit A7 processor will not reach its full potential until developers create applications supporting it. Myriam Joire of Engadget found that the iPhone 5s could benefit significantly from the A7 if developers created applications optimized for the 64-bit processor. Anand Lal Shimpi of AnandTech praised the phone's A7 processor, describing it as "seriously impressive", and stated that it

8820-719: The physical placement of chips on the module. All ranks are connected to the same memory bus (address + data). The chip select signal is used to issue commands to specific rank. Adding modules to the single memory bus creates additional electrical load on its drivers. To mitigate the resulting bus signaling rate drop and overcome the memory bottleneck , new chipsets employ the multi-channel architecture. Note: All items listed above are specified by JEDEC as JESD79F. All RAM data rates in-between or above these listed specifications are not standardized by JEDEC – often they are simply manufacturer optimizations using tighter tolerances or overvolted chips. The package sizes in which DDR SDRAM

8925-461: The predecessor ) and larger sized pixels in its image sensor than previous iPhone models. The flashlight has dual "True Tone" flashes, consisting of an amber LED and a white LED, which are variably used based on the color temperature of the photo to improve color balancing . The camera software includes automatic digital image stabilization , dynamic tone mapping , 10 fps burst mode and slow motion video at 120 fps. Photos captured during

9030-428: The right notch position. The orientation of the module for determining the key notch position is with 52 contact positions to the left and 40 contact positions to the right. Increasing the operating voltage slightly can increase maximum speed but at the cost of higher power dissipation and heating, and at the risk of malfunctioning or damage. Module and chip characteristics are inherently linked. Total module capacity

9135-399: The rumor. Apple announced the iPhone 5c and the iPhone 5s during a media event at its Cupertino headquarters on September 10, 2013. While the iPhone 5c became available for preorder on September 13, 2013, the iPhone 5s was not available for preorder. Both devices were released on September 20, 2013. While most of the promotion focused on Touch ID , the 64-bit Apple A7 processor

9240-401: The same quarter as the iPhone 5s. The phone includes a 1560 mAh battery, which provides 10 hours of talk time and 250 hours of standby time. The home button on the iPhone 5s incorporates a fingerprint recognition system known as Touch ID , based on technology from AuthenTec, a company which Apple had acquired in 2012. The sensor uses a capacitive CMOS -based sensor which can detect

9345-400: The second iOS device to support six major updates – the first being the iPad 2 which supported iOS versions 4 to 9. Reception towards the device was positive, with some outlets considering it to be the best smartphone available on the market due to its upgraded hardware, Touch ID, and other changes introduced by iOS 7. Some criticized the iPhone 5s for keeping the design and small display of

9450-478: The station's songs from the iTunes Store . Users could also search through their history of previous songs. Apple announced in June 2018 that the iPhone 5s would support the iOS 12 update. This made it the second longest supported iOS device, having supported six major versions of the iOS operating system, on par with the iPad 2 which supported iOS 4 through iOS 9 . The iPhone 5s would also receive major speed boosts of up to 70%, according to Apple. This included

9555-444: The transfer rate, and the quarter-speed master clock, results in a master clock which is half the frequency of a similar LPDDR4 clock. The command (CA) bus is widened to 7 bits, and commands are transferred at double data rate, so commands end up being sent at the same rate as LPDDR4. Compared to earlier standards, the nomenclature for column addresses has changed. Both LPDDR4 and LPDDR5 allow up to 10 bits of column address, but

9660-409: The way the aluminum and glass work together. It felt streamlined, yet substantial, which is different from iPhone 6, which feels substantial in size alone. Plus, unlike the ubiquitous rounded corners of the 6, iPhone 5 didn't really look like anything else on the market at the time". However, the iPhone 5/5s design was not suited to scaling up, in contrast to the iPhone 6/6S which could better accommodate

9765-425: Was Rambus XDR DRAM . DDR2 dominated due to cost and support factors. DDR2 was in turn superseded by DDR3 SDRAM , which offered higher performance for increased bus speeds and new features. DDR3 has been superseded by DDR4 SDRAM , which was first produced in 2011 and whose standards were still in flux (2012) with significant architectural changes. DDR's prefetch buffer depth is 2 (bits), while DDR2 uses 4. Although

9870-443: Was 2–3 times more expensive than 1 GB DDR2. MDDR is an acronym that some enterprises use for Mobile DDR SDRAM, a type of memory used in some portable electronic devices, like mobile phones , handhelds , and digital audio players . Through techniques including reduced voltage supply and advanced refresh options, Mobile DDR can achieve greater power efficiency. IPhone 5S List of iPhone models The iPhone 5s

9975-407: Was also a highlight during the event. This is the first-ever 64-bit processor in a phone of any kind. I don't think the other guys are even talking about it yet. Why go through all this? The benefits are huge. The A7 is up to twice as fast as the previous-generation system at CPU tasks, and up to twice as fast at graphics tasks, too. Schiller then showed demos of Infinity Blade III to demonstrate

10080-457: Was also updated with a larger aperture and a dual-LED flash optimized for different color temperatures . EarPods , which were introduced the year prior and had been shipping with the iPhone 5, were included in the box. The iPhone 5s originally shipped with iOS 7 , which introduced a revamped visual appearance among other new features. Designed by Jony Ive , iOS 7 departed from skeuomorphic elements used in previous versions of iOS in favor of

10185-463: Was designed by Apple and manufactured by Samsung . The A7 processor is accompanied by the M7 "motion co-processor", a dedicated processor for processing motion data from the iPhone's accelerometer and gyroscopes without requiring the attention of the main processor, which integrates with iOS 7's new CoreMotion APIs . The same A7 SoC and M7 motion co-processor are also found in the iPad Air and iPad Mini 2 , both of which were released in

10290-489: Was made. DDR SDRAM modules for desktop computers, dual in-line memory modules (DIMMs) , have 184 pins (as opposed to 168 pins on SDRAM, or 240 pins on DDR2 SDRAM), and can be differentiated from SDRAM DIMMs by the number of notches (DDR SDRAM has one, SDRAM has two). DDR SDRAM for notebook computers, SO-DIMMs , have 200 pins, which is the same number of pins as DDR2 SO-DIMMs. These two specifications are notched very similarly and care must be taken during insertion if unsure of

10395-522: Was released in August 2000. To increase memory capacity and bandwidth, chips are combined on a module. For instance, the 64-bit data bus for DIMM requires eight 8-bit chips, addressed in parallel. Multiple chips with common address lines are called a memory rank . The term was introduced to avoid confusion with chip internal rows and banks . A memory module may bear more than one rank. The term sides would also be confusing because it incorrectly suggests

10500-518: Was the best selling phone on AT&T , Sprint , Verizon , and T-Mobile in September 2013 in the United States, outselling the iPhone 5c and Samsung Galaxy S4 . According to Consumer Intelligence Research Partners, the iPhone 5s outsold the 5c by a two-to-one margin during its September release, confirming Apple CEO Tim Cook 's view that the high-end smartphone market was not reaching a point of market saturation . While commentators viewed

10605-432: Was the biggest change of the device over previous generations, praising new Siri features, Control Center, and AirDrop. In an editorial, Pogue stated that iOS 7 was the biggest change in the iPhone series, citing utilitarian interface changes as the main contributor to this. Scott Stein of CNET criticized the lack of design change over iPhone 5 and said that although the iPhone 5s "is not a required upgrade, but it's easily

10710-554: Was the first iPhone to be available in a gold color; this decision was influenced by the fact that gold is seen as a popular sign of a luxury product among Chinese customers. The iPhone 5s is powered by the Apple A7 system-on-chip, the first 64-bit processor ever used on a smartphone. The device's operating system and pre-loaded software were optimized to run in 64-bit mode, promising increased performance, although third-party app developers would need to optimize their apps to take advantage of these enhanced capabilities. The A7 processor

10815-468: Was the first time that Apple launched two models simultaneously. The first-day release in China also contributed to the record sales result. On launch day, major in-stock shortages were reported in most stores, across all countries where the iPhone 5s initially went on sale. A great many customers in line outside Apple Stores worldwide were left disappointed due to severe shortages across all 5s models, with

10920-399: Was the last country to receive the iPhone 5s, on January 26, 2014. The iPhone 5s was succeeded as Apple's flagship smartphone by the iPhone 6 and iPhone 6 Plus on September 19, 2014, but the older model remained available for purchase at a reduced price, while the 64 GB version was discontinued. The gold edition of the iPhone 5s was discontinued on September 9, 2015, when Apple revealed

11025-464: Was the most "futureproof of any iPhone ever launched. As much as it pains me to use the word futureproof if you are one of those people who likes to hold onto their device for a while – the iPhone 5s is as good a starting point as any." Scott Lowe of IGN also spoke highly of its 64-bit processor, "which has a substantial lead in processing power over the HTC One and Samsung Galaxy S4 , accounting for

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